DEC Digital Alpha VME 4/224 User Manual page 441

VME interface (cont'd)
registers, summary of, 10–37
restrictions, 10–40
scatter-gather entry, outbound, 10–4
scatter-gather mapping, outbound,
10–4
single mode data transfers, 10–7
tests, 4–28
VME interrupt request interrupt control
registers, 11–7
VME PCI configuration registers, 10–30
VMEbus, 1–2
ACFAIL* assertion, 11–8
arbitration, 10–18
control of, 10–17
schemes, 10–17
arbitration timeout, 11–8
arbitration timers, 10–21
connector pinouts, A–2
IACK cycle, 11–9
interrupt control, 10–17
interrupt handling for, 10–23
interrupt requests, 11–7
mapping memory pages to PCI bus,
10–10
master, 10–9
release modes, 10–20
releasing, 10–19
requesting access to, 10–18
requesting ownership of, 10–9
scatter-gather RAM test, 4–29
slave, 10–9
swap modes for, 10–26
SYSFAIL* assertion, 11–8
timeout timers, 10–21
transfer timers, 10–22
VMEbus interrupt vector base registers,
10–24
VMEbus interrupter interrupt control
register, 10–25, 11–10
VMEbus master, 10–2
VMEbus transfer timeout register, 10–22
VME_A16_BASE environment variable,
3–7
VME_A24_BASE environment variable,
3–7
VME_A24_SIZE environment variable,
3–7
VME_A32_BASE environment variable,
3–7
VME_A32_SIZE environment variable,
3–7
VME_CONFIG environment variable,
3–7
VxWorks for Alpha kernel, booting, 3–7
VX_BOOTLINE environment variable,
3–7
W
Warranty information, 2–32
Watchdog timer, 9–33
interrupt test, 4–27
module control register, 9–35
registers, 9–34
reset signal, 2–16
signal jumper, 2–16
test, 4–4
testing, 4–27
timeout LED, 3–2
TOY clock command register, 9–34
wdog_diag command, 4–27
Word swap mode, 10–26
Write buffer, memory, 6–32
Write transactions
from PCI host bridge, 7–3
PCI host bridge, to main memory, 7–4
X
Xilinx interrupt controller, 11–2
Index–17