Agilent Technologies HP 8719D Service Manual page 350

Network analyzers
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mixed with the 1st LO harmonics in the samplers. One of the harmonic signals is
10 MHz above the desired frequency. The mixing products are atered, leaving
only the difference between that harmonic and the source frequency: this fixed
10 MHz signal is the 1st IF (Fir = N x FVCO - Fs, where N is the harmonic
number). Part of the 1st IF signal from the R sampler is fed back to the All
phase lock assembly to complete the source phase-locked loop. The 1st IF
from all three samplers goes to the corresponding second converters. The A67
sampler is only used in Option 400 instruments.
LO
The stable 2nd LO signal is produced in the Al2 reference
assembly by phase locking and mixing a 39.984 MHz VCO with the 40 MHz
VCXO to derive a difference of 16 kHz. This is compared to a 16 kHz reference
produced by dividing 40 MHz by 2500. The phase-locked output of the 39.984
MHz oscillator is divided by 4 to provide the 9.996 MHz 2nd LO.
second converter. The resulting difference frequency is a constant 4 kHz 2nd
IF signal that retains the amplitude and phase characteristics of the measured
signal. The 2nd IF signals from all three second converter assemblies are input
to the A10 digital IF assembly.
In this assembly, the 2nd IF signals from the A and B second converters go
through a gain stage. Signals lower than -30 dB on these two signal paths
are amplified by 24 dB to ensure that they can be detected by the ADC
(analog-to-digital converter). For troubleshooting purposes, the gain can be
forced on or off using the service menus (refer to "Receiver Troubleshooting").
The R path signal is fixed at a level high enough to maintain phase lock, and
therefore requires no amplification.
All three signals are sampled at a 16 kHz rate set by a divided-down 4 MHz
clock pulse from the Al2 reference assembly. The signals are sequentially
multiplexed into the ADC, where they are converted to digital form. The ADC
conversions are triggered by timing signals from the CPU or the synthesizer, or
an external signal at the rear panel EXT TRIG connector. The digitized data is
serially clocked into the A7 CPU assembly to be processed into magnitude and
phase data.
The signal from the source is
Theory of Operation

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