Agilent Technologies HP 8719D Service Manual page 341

Source Pretune
The pretune DAC (digital-to-analog converter) in the All phase lock assembly
sets the source YIG oscillator frequency to approximately 2.4 GHz. This signal
(SOURCE OUT) goes to the R sampler assembly.
The A14/A13 fractional-N assemblies comprise the synthesizer. The source
feedback circuit phase locks the YIG oscillator to the synthesizer output signal
as explained below under "Al1 Phase Lock: Comparing Phase and Frequency. n
The VCO in the Al4 fractional-N (digital) assembly generates a swept or CW
signal in the range of 60 to 240 MHz, such that a harmonic is 10 MHz above the
desired start frequency. This is divided down and phase locked (in the Al3
assembly) to a 100 kHz signal FN REF from the Al2 reference. A programmable
divider is set to some number, N, such that the integer part of the expression
FVCOM is equal to 100 kHz. 'lb achieve frequencies between integer multiples
of the reference, the divider is programmed to divide by N part of the time and
by N + 1 part of the time. The ratio of the divisions yields an average equal
to the desired fractional frequency. API (analog phase interpolator) current
sources in the Al3 assembly correct for phase errors caused by the averaging.
The resulting synthesized signal goes to the pulse generator.
The signal from the synthesizer drives a step recovery diode (SRD) in the A52
pulse generator assembly. The SRD generates a comb of harmonic multiples (1st
LO) of the VCO frequency, which goes to the samplers. One of the harmonics is
10 MHz above the desired start frequency.
The A64 assembly is part of the receiver functional group. It is also included
here because it is an integral part of the source phase locking scheme. In the R
sampler, the 1st Lo signal from the pulse generator is mixed with the SOURCE
OUT signal from the source. The difference IF (intermediate frequency)
produced is nominally 10 MHz. For phase locking, part of this IF signal is routed
back to the All phase lock assembly. (Additional information on the sampler
assemblies is provided in "Receiver Theory. ")