Page 1 User’s Guide Publication Number 01660-97028 August 1998 For Safety information, Warranties, and Regulatory information, see the pages behind the index. ©Copyright Hewlett-Packard Company 1994-1998 All Rights Reserved HP 1660E/ES/EP and 1670E Series Logic Analyzers...
Page 2 HP 1660E/ES/EP-Series Logic Analyzers The HP 1660E/ES/EP-Series are 100-MHz State/500-MHz Timing Logic Analyzers with a VGA resolution color display. The HP 1660ES-Series has a 2 GSa/s digitizing oscilloscope. The HP 1660EP-Series has a built in 32 channel pattern generator. Logic Analyzer Features •...
Page 3 Oscilloscope Features (HP 1660ES-Series only) • 500 MHz bandwidth Gigasample per second • 2 max sampling rate • 32768 samples per channel • Marker measurements displays time between markers, acquires until specified time between markers in captured, performs statistical analysis on time between markers •...
Page 4 HP 1670E-Series Logic Analyzers The HP 1670E-series logic analyzers are 100-MHz state/250-MHz timing logic analyzers with VGA resolution color displays. Features • 132 data channels and 4 clock/data channels in the HP 1670E • 98 data channels and 4 clock/data channels in the HP 1671E •...
Page 5: In This Book
In This Book In This Book This User’s Guide has three sections. Section 1 covers how to use the HP 1660E/ES/EP and HP 1670E-series logic analyzers. Section 2 covers how to connect, use, and troubleshoot the HP logic analyzer via a Local Area Network (LAN) connection.
Page 6 In This Book...
Page 7: Table Of Contents
Contents In This Book 5 SECTION 1 1 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer 28 To make a measurement 31 2 Connecting Peripherals Connecting Peripherals 38 To connect a mouse 39 To connect a keyboard 40 To connect to an HP-IB printer 41 To connect to an RS-232-C printer 43 To connect to a parallel printer 45 To connect to a controller 46...
Page 8 Contents Using the Analyzer Menus 54 To label channel groups 54 To create a symbol 57 To examine an analyzer waveform 59 To examine an analyzer listing 62 To compare two listings 65 The Inverse Assembler 67 To use an inverse assembler 67 4 Using the Trigger Menu Using the Trigger Menu 72 Specifying a Basic Trigger 73...
Page 9 Contents Managing Memory 91 To selectively store branch conditions (State only) 92 To set the memory length 94 To place the trigger in memory 96 To set the sampling rates (Timing only) 98 5 Using the Oscilloscope Using the Oscilloscope 100 Calibrating the oscilloscope 101 Calibration PROTECT/UNPROTECT switch 101 Set up the equipment 101...
Page 10 Contents The Scope Display Menu 114 Mode field 114 Connect Dots field 116 Grid field 116 Display Options field 117 The Scope Trigger Menu 118 Trigger marker 118 Mode/Arm menu 118 Level field 121 Source field 123 Slope field 123 Count field 124 Auto-Trig field 125 When field 126...
Page 11 Contents Setting Up the Proper Configurations 151 To set up the configuration 151 To build a label 153 Building Test Vectors and Macros 154 To build a main vector sequence 155 To build an initialization sequence 156 To edit a main or initialization sequence 157 To include hardware instructions in a sequence 158 To include software instructions in a sequence 159 To include a user macro in a sequence 160...
Page 12 Contents Loading ASCII Files 187 ASCII File Commands 188 ASCDown Command 188 LABel 189 VECTor 190 FORMat:xxx 193 Loading an ASCII file over a bus (example) 194 Pattern Generator Probing System 196 7 Triggering Examples Triggering Examples 198 Single-Machine Trigger Examples 199 To store and time the execution of a subroutine 200 To trigger on the nth iteration of a loop 202 To trigger on the nth recursive call of a recursive function 204...
Page 13 Contents Cross-Arming Trigger Examples 220 To examine software execution when a timing violation occurs 221 To look at control and status signals during execution of a routine 223 To detect a glitch 224 To capture the waveform of a glitch using the oscilloscope (1660ES-series only) 225 To view your target system processing an interrupt (1660ES-series only) 226 To trigger timing analysis of a count-down on a set of data lines 227...
Page 14 Contents 9 Logic Analyzer Reference HP 1660E/ES/EP-Series Logic Analyzer Description 248 HP 1660E/ES/EP-Series Configuration Capabilities 250 HP 1670E-Series Logic Analyzer Description 252 HP 1670E-Series Configuration Capabilities 253 Probing 256 General-purpose probing system description 259 Assembling the probing system 263 Oscilloscope probes 267 Connecting the pattern generator pods directly to a PC board 268 Pattern generator output pod characteristics 269 Keyboard Shortcuts 275...
Page 15 Contents The RS-232-C, HP-IB, and Centronics Interfaces 290 The HP-IB interface 291 The RS-232-C interface 292 The Centronics interface 293 The Ethernet LAN interface 294 System Utilities 297 Real Time Clock Adjustments field 297 Update FLASH ROM field 298 Display Color Selection 300 Setting the Color, Hue, Saturation, and Luminosity Fields 302 Returning to the Default Colors 302 The Analyzer Configuration Menu 303...
Page 16 Contents The Analyzer Trigger Menu 321 Trigger sequence levels 321 Modify Trigger field 322 Timing trigger macro library 323 State trigger macro library 325 Modifying the user macro 328 Resource terms 332 Arming Control field 336 Acquisition Control field 338 Count field (State only) 340 The Listing Menu 341 Markers 341...
Page 17 Contents The Compare Menu 353 Reference Listing field 354 Difference Listing field 354 Copy Listing to Reference field 355 Find Error field 356 Compare Full/Compare Partial field 356 10 System Performance Analysis (SPA) Software System Performance Analysis Software 360 What is System Performance Analysis? 362 Getting started 365 SPA measurement processes 367 Using State Overview, State Histogram, and Time Interval 383...
Page 18 Contents The Trigger Sequence 407 Trigger sequence specification 408 Analyzer resources 411 Timing analyzer 416 State analyzer 416 Configuration Translation Between HP Logic Analyzers 417 The Analyzer Hardware 419 HP 1660E/ES/EP-series analyzer theory 420 Logic acquisition board theory 424 Oscilloscope board theory 428 Pattern Generator board theory 433 Self-tests description 436 12 Troubleshooting the Logic Analyzer...
Page 19 Contents Inverse Assembler Problems 445 No inverse assembly or incorrect inverse assembly 445 Inverse assembler will not load or run 447 Error Messages 448 ". . . Inverse Assembler Not Found" 448 "No Configuration File Loaded" 448 "Selected File is Incompatible" 449 "Slow or Missing Clock"...
Page 20 Contents 14 Operator’s Service Operator’s Service 470 Preparing For Use 471 To inspect the logic analyzer 472 To apply power 472 To set the line voltage 473 To degauss the display 474 To clean the logic analyzer 474 To test the logic analyzer 474 Troubleshooting 475 To use the flowcharts 476 To check the power-up tests 478...
Page 21 Contents 17 Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN 506 To mount the file system via NFS 507 To access the file system via ftp 512 18 Using the LAN’s X Window Interface Using the LAN’s X Window Interface 514 To start the interface from the front panel 515 To start the interface from the computer 517...
Page 22 Contents 20 Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN 538 To set up for Ethernet LAN programming 539 To enter commands directly using telnet 540 To write programs that open the command parser socket 542 21 LAN Concepts LAN Concepts 546 Directory structure of the logic analyzer’s file system 547...
Page 23 Contents Solutions to Common Problems 571 If you cannot connect to the logic analyzer 571 If you cannot mount the logic analyzer file system 572 If you cannot access the file system via ftp 572 If you cannot start the XWindow interface 573 If your X Window looks odd 573 If you cannot copy files from the logic analyzer 574 If you cannot restore raw files 574...
Page 24 Contents 25 Using the Symbol Utility To generate a symbol file 596 To Load a Symbol File 597 To Display Symbols in the Trace List 600 To Trigger on a Symbol 602 To View a List of Symbol Files Currently Loaded into the System 605 To Remove a Symbol File From the System 606 26 Symbol Utility Features and Functions Symbol Utility Features and Functions 608...
Page 25 Contents The General-Purpose ASCII File Format 625 Creating a GPA Symbol File 626 GPA File Format 627 Sections Functions Variables Source Line Numbers Start Address 634 Comments...
Page 26 Contents...
Page 27 Section 1 Logic Analyzer...
Page 29: Logic Analyzer Overview
Logic Analyzer Overview...
Page 30: Hp 1660/70-Series Logic Analyzer
Logic Analyzer Overview HP 1660/70-Series Logic Analyzer HP 1660/70-Series Logic Analyzer HP 1660ES-Series Logic Analyzer Front Panel Select Key The Select key action depends on the type of field currently highlighted. If the field is an option field, the Select key brings up an option menu or, if there are only two possible values, toggles the value in the field.
Page 31 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer Shift Key The Shift key, which is blue, provides lowercase letters and access to the functions in blue on some of the keys. You do not need to hold the shift key down while pressing the other key. Press the shift key first, and then the function key.
Page 32 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer External Trigger BNCs The External Trigger BNCs provide the "Port In" and "Port Out" connections for the Arm In and Arm Out of the Trigger Arming Control menu. RS-232-C Connector Standard DB-25 type connector for connecting an RS-232-C printer or controller.
Page 33: To Make A Measurement
Logic Analyzer Overview HP 1660/70-Series Logic Analyzer To make a measurement For more detail on any of the information below, see the referenced chapters or the Logic Analyzer Training Kit. If you are using an analysis probe with the logic analyzer, some of these steps may not apply. Map to target Connect probes Connect probes from the target system to the logic analyzer to...
Page 34 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer Assign pods* In the Analyzer Configuration menu, assign the connected pods to the analyzer you want to use. The number of pods on your logic analyzer depends on the model. Pods are paired and always assigned as a pair to a particular analyzer.
Page 35 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer Set up trigger Define terms In the Analyzer Trigger menu, define trigger variables called terms to match specific conditions in your target system. Terms can match patterns, ranges, or edges across multiple labels. Configure Arming Control Use Arming Control if: •...
Page 36 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer Run measurement Select single or repetitive From any Analyzer menu, select the field labeled Run in the upper right corner to start measuring, or press the Run key. A single run will run once, until memory is full; a repetitive run will go until you select Stop or until a stop measurement condition that you set in the markers menu is fulfilled.
Page 37 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer View data Search for patterns In both the Waveform and Listing menus you can use symbols and markers to search for patterns in your data. In the Analyzer Waveform or Analyzer Listing menu, toggle the Markers field to turn the pattern markers on and then specify the pattern.
Page 38 Logic Analyzer Overview HP 1660/70-Series Logic Analyzer Make measurements The markers can count occurrences of events, measure durations, and collect statistics, and SPA provides high-level summaries to help you identify bottlenecks. To use the markers, select the appropriate marker type in the display menu and specify the data patterns for the marker. To use SPA, go to the SPA menu, select the most appropriate mode, fill in the parameters, and press Run.
Page 39 Connecting Peripherals...
Page 40: Connecting Peripherals
Connecting Peripherals Connecting Peripherals Connecting Peripherals The HP 1660E/ES/EP and HP 1670E-series logic analyzers comes with a PS2 mouse. It also provides connectors for a keyboard, Centronics (parallel) printer, and HP-IB and RS-232-C devices. This chapter tells you how to connect peripheral equipment such as the mouse or a printer to the logic analyzer.
Page 41: To Connect A Mouse
Connecting Peripherals Connecting Peripherals To connect a mouse Hewlett-Packard supplies a mouse with the logic analyzer. If you prefer a different style of mouse you can use any PS2 mouse with a standard PS2 DIN interface. 1 Plug the mouse into the mouse connector on the back panel. Make sure the plug shows the arrow on top.
Page 42: To Connect A Keyboard
Connecting Peripherals Connecting Peripherals To connect a keyboard You can use either the HP-recommended keyboard, HPE2427B, or any other keyboard with a standard DIN connector. 1 Plug the keyboard into the keyboard connector on the back panel. 2 To verify, check the System External I/O menu for a keyboard box.
Page 43: To Connect To An Hp-Ib Printer
Connecting Peripherals Connecting Peripherals To connect to an HP-IB printer Printers connected to the logic analyzer over HP-IB must support HP- IB and Listen Always. When controlling a printer, the analyzer’s HP-IB port does not respond to service requests (SRQ), so the SRQ enable setting does not have any effect on printer operation.
Page 44 Connecting Peripherals Connecting Peripherals 4 Go to the System External I/O menu and configure the analyzer’s printer settings. a If the analyzer is not already set to HP-IB, select the field under Connected To: in the Printer box and choose HP-IB from the menu.
Page 45: To Connect To An Rs-232-C Printer
Connecting Peripherals Connecting Peripherals To connect to an RS-232-C printer 1 Turn off the analyzer and the printer, and connect a null-modem RS-232-C cable from the printer to the RS-232-C connector on the analyzer rear panel. 2 Before turning on the printer, locate the mode configuration switches on the printer and set them as follows: •...
Page 46 Connecting Peripherals Connecting Peripherals d If the default print width and page length are not what you want, select the fields to toggle them. If you select 132 characters per line when using a printer other than QuietJet, the listings are printed in a compressed mode.
Page 47: To Connect To A Parallel Printer
Connecting Peripherals Connecting Peripherals To connect to a parallel printer 1 Turn off the analyzer and the printer, and connect a parallel printer cable from the printer to the parallel printer connector on the analyzer rear panel. 2 Before turning on the printer, configure the printer for parallel operation.
Page 48: To Connect To A Controller
Connecting Peripherals Connecting Peripherals To connect to a controller You can control the HP 1660E/ES/EP-series logic analyzer with another instrument, such as a computer running a program with embedded analyzer commands. The steps below outline the general procedure for connecting to a controller using HP-IB or RS-232-C. 1 Turn off both instruments, and connect the cable.
Page 49 Using the Logic Analyzer...
Page 50: Using The Logic Analyzer
Using the Logic Analyzer Using the Logic Analyzer Using the Logic Analyzer This chapter shows you how to perform the basic tasks necessary to make a measurement. Each section uses an example to show how the task fits into the overall goal of making a measurement.
Page 51: Accessing The Menus
Using the Logic Analyzer Accessing the Menus Accessing the Menus When you power up the logic analyzer, the first screen after the system tests is the Analyzer Configuration menu. Menus are identified by two fields in the upper left corner.The leftmost field shows Analyzer. This field is sometimes referred to as the "mode field"...
Page 52: To Access The System Menus
Using the Logic Analyzer Accessing the Menus To access the System menus The System menus allow you to perform operations that affect the entire logic analyzer, such as load configurations, change colors, and perform system diagnostics. 1 Select the mode field. Use the arrow keys to highlight the mode field, then press the Select key.
Page 53 Using the Logic Analyzer Accessing the Menus • Hard Disk allows you to perform file operations on the hard disk. • Flexible Disk allows you to perform file operations on the flexible disk. • External I/O allows you to configure your HP-IB, RS-232-C, and LAN interfaces and connect to a printer and controller.
Page 54: To Access The Analyzer Menus
Using the Logic Analyzer Accessing the Menus To access the Analyzer menus The Analyzer menus allow you to control the analyzer to make your measurement, perform operations on the data, and view the results on the display. 1 Select the mode field. A pop-up menu appears with the choices System, Analyzer, and Patt Gen or Scope.
Page 55 Using the Logic Analyzer Accessing the Menus • Mixed Display always appears in the menu list when an analyzer is set to State or Timing, but it requires a State analyzer with time tags enabled. • Waveform is available when an analyzer is set to State or Timing. Use Waveform to view the data as logic levels on discrete lines.
Page 56: Using The Analyzer Menus
Using the Logic Analyzer Using the Analyzer Menus Using the Analyzer Menus The following examples show how to use some of the Analyzer menus to configure the logic analyzer for measurements. These examples assume that you have already determined which signals are of interest, and have connected the logic analyzer to the target system.
Page 57 Using the Logic Analyzer Using the Analyzer Menus To create or modify a label and assign channel groups, use the following procedure. 1 Press the Format key to go to the Format menu. 2 Select a label under the Labels heading. In the pop-up menu, select Modify Label.
Page 58 Using the Logic Analyzer Using the Analyzer Menus 5 Toggle the channel’s group status by pressing Select. The indicator changes and the selector moves to the next channel. In this example, the channels 3, 1, and 0 (Pod A1) are assigned to label CYCLE 6 Press the Done key to complete selection.
Page 59: To Create A Symbol
Using the Logic Analyzer Using the Analyzer Menus To create a symbol Symbols are alphanumeric mnemonics that represent specific data patterns or ranges. When you define a symbol and set the base type to Symbol in the Listing menu, the symbol is displayed in the data listing where the bit pattern would normally be displayed.
Page 60 Using the Logic Analyzer Using the Analyzer Menus 5 If additional Symbols are needed, repeat step 4 until you have added all symbols. In this example, three symbols are added: MEM RD, MEM WR, and DATA RD. 6 Toggle the Type field to "range" or "pattern". When Type is range, a third field appears under the Stop column.
Page 61: To Examine An Analyzer Waveform
Using the Logic Analyzer Using the Analyzer Menus To examine an analyzer waveform The Analyzer Waveform menu lets you view state or timing data in a format similar to an oscilloscope display. The horizontal axis represents states (in state mode) or time (in timing mode) and the vertical axis represents logic highs and lows.
Page 62 Using the Logic Analyzer Using the Analyzer Menus 5 To scroll through waveforms, select the large rectangle below the Div field and use the knob. The roll indicator appears at the top of the rectangle and the name of the first waveform is highlighted. The highlight moves as you turn the knob.
Page 63 Using the Logic Analyzer Using the Analyzer Menus The following example shows a state waveform from the Hewlett- Example Packard analysis probe for the Motorola 68360. Notice how the bus waveforms insert symbols or state data.
Page 64: To Examine An Analyzer Listing
Using the Logic Analyzer Using the Analyzer Menus To examine an analyzer listing The Analyzer Listing menu displays state or timing data as patterns (states). The Listing menu uses any of several formats to display the data such as binary, ASCII, or symbols. If you are using an inverse assembler and select Invasm, the data is displayed in mnemonics that closely resemble the microprocessor source code.
Page 65 Using the Logic Analyzer Using the Analyzer Menus 4 To scroll the data, use the Page keys or select the data roll field and use the knob. If you select the data roll field, the roll indicator moves to it. No matter which field is currently controlled by the knob, however, the Page keys page the data up or down.
Page 66 Using the Logic Analyzer Using the Analyzer Menus The following illustration shows a listing from the Hewlett-Packard Example analysis probe for the Motorola 68360. The ADDR label has the base set to Hex to conserve space on the display. The DATA label has the base set to Invasm for inverse assembly.
Page 67: To Compare Two Listings
Using the Logic Analyzer Using the Analyzer Menus To compare two listings The Compare menu allows you to take two state analyzer acquisitions and compare them to find the differences. You can use this function to quickly find all the effects after changing the target system or to quickly compare the results of quality tests with results from a working system.
Page 68 Using the Logic Analyzer Using the Analyzer Menus The Difference listing displays the states that are identical in dark typeface, and the states that are different in light typeface (indistinguishable in the above illustration). The light typeface shows the data from the compare file that is different from the data in the reference file.
Page 69: The Inverse Assembler
Using the Logic Analyzer The Inverse Assembler The Inverse Assembler When the analyzer captures a trace, it captures binary information. The analyzer can then present this information in symbol, binary, octal, decimal, hexadecimal, or ASCII. Or, if given information about the meaning of the data captured, the analyzer can inverse assemble the trace.
Page 70 Using the Logic Analyzer The Inverse Assembler The particular sequences that each label requires depends on the type of chip the inverse assembler was designed for. Because of this, inverse assemblers cannot generally be transferred between platforms. To run the inverse assembler, you must be sure the labels are spelled correctly as shown here, or as directed in your inverse assembler documentation.
Page 71 Using the Logic Analyzer The Inverse Assembler If you roll the trace list to a new position and press Invasm again, the inverse assembler repeats the above process. However, it does not work backward in the trace list from the starting position. This may cause differences in the trace list above and below the point where you synchronized inverse assembly.
Page 72 Using the Logic Analyzer The Inverse Assembler...
Page 73 Using the Trigger Menu...
Page 74: Using The Trigger Menu
Using the Trigger Menu Using the Trigger Menu Using the Trigger Menu To use the logic analyzer efficiently, you need to be able to set up your own triggers. This chapter provides examples of triggering. Those examples assume you already know where to find fields in the trigger menu.
Page 75: Specifying A Basic Trigger
Using the Trigger Menu Specifying a Basic Trigger Specifying a Basic Trigger The default analyzer triggers are While storing "anystate" TRIGGER on "a" 1 time Store "anystate" for state analyzers and TRIGGER on "a" > 8 ns for timing analyzers. If you want to simply record data, these will get you started.
Page 76: To Assign Terms To An Analyzer
Using the Trigger Menu Specifying a Basic Trigger To assign terms to an analyzer When you turn the logic analyzer on, Analyzer 1 is named Machine 1 and Analyzer 2 is off. Because trigger terms can only be used by one analyzer at a time, all the terms are assigned to Analyzer 1.
Page 77 Using the Trigger Menu Specifying a Basic Trigger 4 To change a term assignment, select the term field. The term fields toggle from one section to the other. You can get all your terms assigned at once, or just change a few to meet immediate needs.
Page 78: To Define A Term
Using the Trigger Menu Specifying a Basic Trigger To define a term Both default triggers trigger on term "a". If you only need to look for the occurrence of a certain state, such as a write to protected memory, then you only need to define term "a" to make the measurement you want.
Page 79: To Change The Trigger Specification
Using the Trigger Menu Specifying a Basic Trigger To change the trigger specification Most triggers use terms other than "a." Even a simple trigger might use additional terms to set conditions on the actual trigger. To use these terms, you must include them in the trigger sequence specification. 1 In the Trigger menu, select the number beside the specific level you want to modify.
Page 80 Using the Trigger Menu Specifying a Basic Trigger 4 Select Done until you are back at the Trigger menu. Term Selection Pop-up Menu...
Page 81: Changing The Trigger Sequence
Using the Trigger Menu Changing the Trigger Sequence Changing the Trigger Sequence Most measurements require more complicated triggers to better filter information. From the basic trigger, you can: • Add sequence levels • Change macros Your logic analyzer provides a macro library to make setting up the trigger easier.
Page 82: To Add Sequence Levels
Using the Trigger Menu Changing the Trigger Sequence To add sequence levels You can add sequence levels anywhere except after the final one. 1 In the Trigger menu, select the number beside the sequence level just after where you want to insert. For example, if you want to insert a sequence level between levels 1 and 2, you would select level 2.
Page 83 Using the Trigger Menu Changing the Trigger Sequence 5 Fill in the fields and select Done. Sequence Level Pop-up Menu...
Page 84: To Change Macros
Using the Trigger Menu Changing the Trigger Sequence To change macros You do not need to add and delete levels just to change a level’s macro. This can be done from within the Sequence Level pop-up. 1 From the Trigger menu, select the sequence level number of the sequence level you want to modify.
Page 85: Setting Up Time Correlation Between Analyzers
Using the Trigger Menu Setting Up Time Correlation between Analyzers Setting Up Time Correlation between Analyzers There are two possible combinations of analyzers: state and state, and state and timing. Timing and timing is not possible because the Analyzer Configuration menu only permits one analyzer at a time to be configured as a timing analyzer.
Page 86: To Set Up Time Correlation Between Two State Analyzers
Using the Trigger Menu Setting Up Time Correlation between Analyzers To set up time correlation between two state analyzers To correlate the data between two state analyzers, both must have Count Time turned on in their Trigger menus. Although both have Count State available, it is not possible to correlate data based on states even when they are identically defined.
Page 87: To Set Up Time Correlation Between A Timing And A State Analyzer
Using the Trigger Menu Setting Up Time Correlation between Analyzers To set up time correlation between a timing and a state analyzer To set up time correlation between a timing and a state analyzer, only the state analyzer needs to have Count Time turned on. The timing analyzer automatically keeps track of time.
Page 88: Arming And Additional Instruments
Using the Trigger Menu Arming and Additional Instruments Arming and Additional Instruments Occasionally you may need to start the analyzer acquiring data when another instrument detects a problem. Or, you may want to have the analyzer itself arm another measuring tool. This is accomplished from the Arming Control field of the Analyzer Trigger menu.
Page 89: To Arm The Oscilloscope With The Analyzer (Hp 1660Es-Series Only)
Using the Trigger Menu Arming and Additional Instruments To arm the oscilloscope with the analyzer (HP 1660ES-series only) If both analyzer and the oscilloscope are turned on, you can configure one analyzer to arm the other analyzer and the oscilloscope. An example of this is when a state analyzer triggers on a bit pattern, then arms a timing analyzer and the oscilloscope which capture and display the waveform after they trigger.
Page 90 Using the Trigger Menu Arming and Additional Instruments In this example STATE MACH triggers from Group Run, then arms Example TIME MACH and Scope. To duplicate this, set STATE MACH to run from Group Run, TIME MACH to run from STATE MACH, and Scope Arm In to Analyzer. Arming with two analyzers and an oscilloscope When the run starts, the state analyzer automatically begins evaluating its trigger sequence instruction.
Page 91: To Receive An Arm Signal From Another Instrument
Using the Trigger Menu Arming and Additional Instruments To receive an arm signal from another instrument When you set the analyzer to wait for an arm signal, it does not react to data that would normally trigger it until after it has received the arm signal.
Page 92 Using the Trigger Menu Arming and Additional Instruments 4 To change the default settings, select the analyzer field. A small pop-up menu appears. To change which device the analyzer is receiving its arm signal from, select the Run from field. To change which sequence level is waiting for the arm signal, select the Arm sequence level field.
Page 93: Managing Memory
Using the Trigger Menu Managing Memory Managing Memory Sometimes you will need every last bit of memory you can get on the logic analyzer. There are three simple ways to maximize memory when specifying your trigger: • Selectively store branch conditions (State only) •...
Page 94: To Selectively Store Branch Conditions (State Only)
Using the Trigger Menu Managing Memory To selectively store branch conditions (State only) Besides setting up your trigger levels to store anystate, no state, or some subset of states, you can also choose whether or not to store branch conditions. Branch conditions are always stored by default, and can make tracing the analyzer’s path through a complicated trigger easier.
Page 95 Using the Trigger Menu Managing Memory 4 Select Done. Acquisition Control Menu with Branches Field Highlighted...
Page 96: To Set The Memory Length
Using the Trigger Menu Managing Memory To set the memory length The 1670E-series logic analyzer’s memory length can be adjusted. The table on the following page shows the amount of memory available for different modes of operation. Typically you will want to use small amounts of memory at the beginning of troubleshooting, when you are first looking for a problem, and use deep memory when you are searching for the root cause.
Page 97 Using the Trigger Menu Managing Memory 3 Select Done to exit the Acquisition Control menu. Mode Memory Full-channel timing 1,040,384 (1 M) Half-channel timing 2,088,960 (2 M) 1,040384 (1 M) State 516,096 (504 K) State 253,952 (248 K) State Compare 122,880 (120) State Compare With tags turned off or non-interleaved tags.
Page 98: To Place The Trigger In Memory
Using the Trigger Menu Managing Memory To place the trigger in memory In Automatic Acquisition Mode, the exact location of the trigger depends on the trigger specification but usually falls around the center. You can manually place it at the beginning, end, or anywhere else. 1 In the Analyzer Trigger menu, select Acquisition Control.
Page 99 Using the Trigger Menu Managing Memory 5 Select Done. Acquisition Control Menu with Trigger Position Pop-up for a Timing Analyzer...
Page 100: To Set The Sampling Rates (Timing Only)
Using the Trigger Menu Managing Memory To set the sampling rates (Timing only) A timing analyzer samples the data based on its own internal clock. A short sample period provides more detail about the device under test; a long sample period allows more time before memory is full. However, if the sample period is too large, some information may be missed.
Page 101 Using the Oscilloscope...
Page 102: Using The Oscilloscope
Using the Oscilloscope Using the Oscilloscope Using the Oscilloscope This chapter covers the oscilloscope common menus and calibration. This chapter covers: • Calibrating the oscilloscope • Oscilloscope common menus...
Page 103: Calibrating The Oscilloscope
Using the Oscilloscope Calibrating the oscilloscope Calibrating the oscilloscope Equipment Required Recommended Equipment Critical Specification Model/Part Cable (2) BNC, 9-inch (equal length) HP 10502A Cable 50 W BNC (m-to-m) 48-inch HP 10503A Adapter BNC tee (m)(f)(f) HP 1250-0781 Adapter BNC (f)(f) (ug-914/u) HP 1250-0080 Calibration PROTECT/UNPROTECT switch The HP 1660ES-series logic analyzers have a calibration...
Page 104: Load The Default Calibration Factors
Using the Oscilloscope Calibrating the oscilloscope Load the default calibration factors Note that once the default calibration factors are loaded, all calibrations must be done. This includes all of the calibrations in the Self Cal menu. The calibration must be performed in the exact sequence listed below.
Page 105: Self Cal Menu Calibrations
Using the Oscilloscope Calibrating the oscilloscope Self Cal menu calibrations Messages will be displayed as each calibration routine is completed to indicate calibration has passed or failed. The resulting calibration factors are automatically stored to nonvolatile RAM at the conclusion of each calibration routine.
Page 106 Using the Oscilloscope Calibrating the oscilloscope 2 Optimize Delay of the Self Cal. a Obtain a BNC 50-W, 48-inch cable. Once you select Start, the instrument will prompt you to connect the cable to the appropriate location on the rear panel of the instrument. b Select the Procedure field, then select Delay from the pop-up menu.
Page 107: Protect The Operational Accuracy Calibration Factors
Using the Oscilloscope Calibrating the oscilloscope 4 Calibrate the Logic Trigger of the Self Cal. a Obtain a BNC 50-W, 48-inch cable. b Select Start. The instrument will prompt you to connect the cable to the appropriate location on the rear panel of the instrument.
Page 108: Oscilloscope Common Menus
Using the Oscilloscope Oscilloscope Common Menus Oscilloscope Common Menus The following options apply to all of the oscilloscope menus. Run/Stop options There are three ways you can manually run and stop the oscilloscope: the Autoscale menu, the Run and Stop keys, and the Run/Stop field. Single and Repetitive modes Single mode acquisition fills acquisition memory once with 8000 samples of the input waveform, automatically stops running, then...
Page 109 Using the Oscilloscope Oscilloscope Common Menus If you have been using the Run field to initiate your runs, the oscilloscope will run in the mode (single or repetitive) that was last chosen using the Run options. If no run mode has been chosen prior to choosing autoscale, the run mode defaults to single mode.
Page 110: Autoscale
Using the Oscilloscope Oscilloscope Common Menus Autoscale Autoscale is an algorithm that automatically optimizes the display of one or more waveforms. When you select the Autoscale field and choose Continue, the autoscale algorithm starts. What the Autoscale algorithm does when a signal is found The autoscale algorithm first checks all input channels to determine whether or not there are any signals present.
Page 111 Using the Oscilloscope Oscilloscope Common Menus Displaying the waveform. When the autoscale algorithm is complete, the oscilloscope automatically starts running, acquires the data, and displays waveforms for the inputs that have been selected. The trigger point on the waveform is determined by the trigger level set by the autoscale algorithm.
Page 112: Time Base
Using the Oscilloscope Oscilloscope Common Menus Time base The s/Div and Delay fields are displayed on all of the oscilloscope menus, except for the Calibration menu. s/Div field The s/Div field allows you to set the sweep speed (time scale) on the horizontal axis of the display from 500 ps/div to 5 sec/div.
Page 113: The Scope Channel Menu
Using the Oscilloscope The Scope Channel Menu The Scope Channel Menu The Channel menu selects the channel input and the values that control the vertical sensitivity, offset, probe attenuation factor, input impedance, and coupling. The Channel menu also gives you preset vertical sensitivity, offset, and trigger level values for ECL and TTL logic levels.
Page 114: Probe Field
Using the Oscilloscope The Scope Channel Menu Probe field You use the Probe field to set the probe attenuation factor for the input channel currently displayed in the Input field. Probe attenuation factor The probe attenuation factor can be set from 1:1 to 1000:1 in increments of one.
Page 115: Preset Field
Using the Oscilloscope The Scope Channel Menu Preset field When you select the Preset field, a pop-up appears, offering choices of TTL, ECL, and User. The Preset field automatically sets offset, V/div, and trigger level values to properly display TTL and ECL logic levels. Trigger level is in the Trigger menu and can be changed only when edge trigger is the selected trigger mode.
Page 116: The Scope Display Menu
Using the Oscilloscope The Scope Display Menu The Scope Display Menu The Display options control how the oscilloscope acquires and displays waveforms. Mode field The Mode field provides three selections: Normal, Average, or Accumulate. Normal mode In Normal mode, the oscilloscope acquires waveform data and displays the waveform acquired from that data.
Page 117 Using the Oscilloscope The Scope Display Menu If you start repetitive run, the oscilloscope acquires and displays data, averaging each run with the preceding set accumulated since you selected repetitive run. When the oscilloscope has acquired the number of waveforms you selected, it displays the advisory message "Number of averages has been met."...
Page 118: Connect Dots Field
Using the Oscilloscope The Scope Display Menu Connect Dots field The oscilloscope display can be enhanced to show a better picture of a waveform by using the Connect Dots On / Off. The default setting for the Connect Dots field is Off. If an edge is fast enough (relative to the sample rate), the signal may begin to look like dots scattered around the display, because each sample is displayed as a single dot.
Page 119: Display Options Field
Using the Oscilloscope The Scope Display Menu Display Options field The Display Options field allows you to display either sample period information or marker value information on the oscilloscope menus, and also provides access to the scope channel labeling menu. The Display Options field appears on the Channel, Trigger, Display and Auto-Measure menus.
Page 120: The Scope Trigger Menu
Using the Oscilloscope The Scope Trigger Menu The Scope Trigger Menu The Scope Trigger menu allows you to choose the method you want to use to trigger the oscilloscope for a particular application. Trigger marker The trigger marker is the dotted vertical line at the center of the waveform display.
Page 121 Using the Oscilloscope The Scope Trigger Menu Edge trigger mode In the edge trigger mode, the oscilloscope triggers at a specified voltage level on a rising or falling edge of one of the input channels. In this mode you can specify which input is the trigger source, set a trigger level voltage, and specify which edge to trigger on.
Page 122 Using the Oscilloscope The Scope Trigger Menu The default condition for all patterns is X, "don’t care." To change the pattern, select the Channel/Pattern field and use the pop-up menu. A pattern of XX says to use NO channels to find the trigger. NOTE: Using NO channels to find the trigger does not equate to Immediate Mode when Auto-Trig is set to Off.
Page 123: Level Field
Using the Oscilloscope The Scope Trigger Menu Level field The Level field shows the voltage value of the trigger level. When the voltage value on the trigger source input waveform equals the trigger level voltage value, the oscilloscope triggers. When you change the trigger level voltage value, the waveform moves horizontally on the display to maintain the trigger point.
Page 124 Using the Oscilloscope The Scope Trigger Menu Since the trigger level range is limited by the voltage values displayed in the waveform window, the voltage window limits can be easily determined. Turn the knob in both directions until the Level field reads minimum and maximum voltage.
Page 125: Source Field
Using the Oscilloscope The Scope Trigger Menu Source field When you select the Source field, a pop-up menu appears showing the inputs available as the trigger source. The source can be channel 1 or channel 2. At power-up, the default channel input selection for the Source field is the lowest numbered input channel.
Page 126: Count Field
Using the Oscilloscope The Scope Trigger Menu Count field The Count field defines the number of trigger events that must occur after the first trigger qualifier before the oscilloscope will trigger and acquire a waveform. In edge trigger mode, you can define a positive or negative edge and the trigger level as a trigger qualifier.
Page 127: Auto-Trig Field
Using the Oscilloscope The Scope Trigger Menu Auto-Trig field The Auto-Trig field allows you to specify whether or not the acquisitions should wait for the specified trigger condition to occur. When you select the Auto-Trig field, the field toggles between On and Off.
Page 128: When Field
Using the Oscilloscope The Scope Trigger Menu When field The When field appears only when Pattern mode is selected. When you select this field, a pop-up menu appears that lets you specify the trigger When condition. Pattern When condition pop-up menu The Pattern When pop-up menu is used to specify the trigger-when condition for pattern triggering.
Page 129 Using the Oscilloscope The Scope Trigger Menu The pattern duration time can be any value between 20 ns and 160 ms in 10 ns steps. If the count set in the Count field is one, the trigger event will be the first pattern event that meets both the pattern specification and the duration specification.
Page 130 Using the Oscilloscope The Scope Trigger Menu If the count set in the Count field is one, the trigger event will be the first pattern event that meets both the pattern specification and the duration specification. If the count is greater than one, only the first pattern event must meet the duration specification.
Page 131: Count Field
Using the Oscilloscope The Scope Trigger Menu If the count set in the Count field is one, the trigger event will be the first pattern event that meets both the pattern specification and the duration specification. If the count is greater than one, only the first pattern event must meet the duration specification.
Page 132: The Scope Marker Menu
Using the Oscilloscope The Scope Marker Menu The Scope Marker Menu The oscilloscope has two sets of markers that allow you to make time and voltage measurements. These measurements can be made either manually (voltage and time markers) or automatically (time markers only).
Page 133 Using the Oscilloscope The Scope Marker Menu Trig to X and Trig to O fields The trigger point is always Time 0. Resolution for Trig to X and Trig to O time values is 2% of the sweep speed(s/Div) setting. The default value for these fields is 0 s, the trigger point.
Page 134 Using the Oscilloscope The Scope Marker Menu The Marker Value display consists of two blocks. One contains settings for the voltage markers, the second contains settings for the time markers. If only one set of markers is turned on, only one of the two blocks will appear on the screen.
Page 135: Automatic Time Markers Options
Using the Oscilloscope The Scope Marker Menu Automatic time markers options When you select the T Markers field, a pop-up menu appears. When you choose the Auto field in the pop-up a pop-up menu for automatic time marker measurements is displayed. The automatic time marker measurements are made by setting the time markers to levels that are a percentage of the top-to-base voltage value of a waveform or to specific voltage levels.
Page 136 Using the Oscilloscope The Scope Marker Menu Set on field The Set on field assigns an input waveform to the Tx or To marker, or allows the marker to be set manually (with the MANUAL selection in the pop-up). When you select the Set on field, a pop-up appears showing the waveform sources available.
Page 137 Using the Oscilloscope The Scope Marker Menu Slope field The Slope field sets the Tx or To marker on either the positive or negative edge of the selected occurrence of a waveform. When you select the Slope field, the slope toggles between Positive and Negative. The default selection for the Slope field is Positive.
Page 138 Using the Oscilloscope The Scope Marker Menu When Statistics is set to Off, the Tx to To, Trig to X, and Trig to O fields appear next to the T Markers field on the Marker menu. The marker statistics (minimum, maximum, and mean) are reset to zero only when you select the Done field on the auto-markers pop-up after making a change to one of the auto-marker placement specification fields (Set On, Type, Level, Slope, or Occur).
Page 139 Using the Oscilloscope The Scope Marker Menu When you select Less Than, the oscilloscope runs until the Tx-To time interval is less than the value entered for the Less Than time field. When the condition is met, the oscilloscope stops making acquisitions and displays the message "Stop condition satisfied."...
Page 140: Manual/Automatic Time Markers Option
Using the Oscilloscope The Scope Marker Menu Manual/Automatic Time Markers option The manual/automatic combination allows you to have one time marker set to automatic mode and one time marker set to be controlled manually with the knob. Setting the Manual/Automatic Time Markers Option To set the manual/automatic option, you select the T Markers field and choose the Auto field from the pop-up.
Page 141: Voltage Markers Options
Using the Oscilloscope The Scope Marker Menu Voltage Markers options When you select the V Markers field on the display, a pop-up menu appears. When you select the On field in the pop-up to turn Voltage Markers On, you can manually move the Va and Vb markers to make voltage measurements.
Page 142 Using the Oscilloscope The Scope Marker Menu Overlay and waveform math traces cannot be selected for voltage marker placement. The Vb On field works similarly. Va Volts field The Va marker is shown on the waveform display as a horizontal dashed line.
Page 143: Channel Label Field
Using the Oscilloscope The Scope Marker Menu Selecting one of the possible time markers for centering the waveform data will cause the timebase delay value to be changed such that the selected marker is positioned at the center of the screen. All acquisition channels are shifted when the trace data is centered.
Page 144: The Scope Auto Measure Menu
Using the Oscilloscope The Scope Auto Measure Menu The Scope Auto Measure Menu One of the primary features of the oscilloscope is its ability to make parametric measurements on displayed waveforms. This section provides details on how automatic measurements are performed and gives some tips on how to improve automatic measurement results.
Page 145: Automatic Measurements Display
Using the Oscilloscope The Scope Auto Measure Menu Automatic measurements display The large field in the middle row of the menu is called the automatic measurements display. This display shows the nine automatic measurements and their values. "Automatic Measurement Algorithms" at the end of this section for an See Also explanation of each of these fields.
Page 146 Using the Oscilloscope The Scope Auto Measure Menu Criteria used for making automatic measurements If more than one waveform, edge, or pulse is displayed, the measurements are made on the first (leftmost) portion of the displayed waveform that can be used. When any of the defined measurements are requested, the oscilloscope first determines the top (100%) and base (0%) voltages of the waveform.
Page 147: Automatic Measurement Algorithms
Using the Oscilloscope The Scope Auto Measure Menu Automatic measurement algorithms The following explains top and base voltages, then defines the measurement algorithms. Top and base voltages All measurements except Vp_p are calculated using the Vtop (100% voltage) and Vbase (0% voltage) levels of the displayed waveform. The Vtop and Vbase levels are determined from an occurrence density histogram of the data points displayed on the screen.
Page 148 Using the Oscilloscope The Scope Auto Measure Menu Measurement algorithms Frequency (Freq). The frequency of the first complete cycle displayed is measured using the 50% levels. If the first edge on the display is rising, then Freq = t rising edge 2 - t rising edge 1 If the first edge on the display is falling, then Freq = t falling edge 2 - t falling edge 1...
Page 149 Using the Oscilloscope The Scope Auto Measure Menu Positive Pulse Width (+Width). Pulse width is measured at the 50% voltage level. If the first edge on the display is rising, then +Width = t falling edge 1 - t rising edge 1 If the first edge on the display is falling, then +Width = t falling edge 2 - t rising edge 1 Negative Pulse Width (-Width).
Page 150 Using the Oscilloscope The Scope Auto Measure Menu Preshoot and Overshoot . Preshoot and Overshoot measure the perturbation on a waveform above or below the top and base voltages (see the "Top and Base Voltages" section earlier in this chapter). These measurements use all data displayed on the screen;...
Page 151 Using the Pattern Generator...
Page 152: Using The Pattern Generator
Using the Pattern Generator Using the Pattern Generator Using the Pattern Generator This chapter provides instructions for using the pattern generator to generate vectors and patterns for design and test environments. It also covers the pattern generator common menus, loading ASCII files, and the pattern generator probing system.
Page 153: Setting Up The Proper Configurations
Using the Pattern Generator Setting Up the Proper Configurations Setting Up the Proper Configurations This section discusses setting up the configuration attributes and parameters of the pattern generator. If you are reloading existing configurations or downloading ASCII vector files, refer to the Load operation in the disk drive menus of the System.
Page 154 Using the Pattern Generator Setting Up the Proper Configurations 4 Set the Clock Out Delay if a delay is needed. Setting a delay is useful when using the clock out edge as a read strobe. If you do not set the Clock Out Delay, the value is uncalibrated.
Page 155: To Build A Label
Using the Pattern Generator Setting Up the Proper Configurations To build a label When you build a label, you are grouping channels under a label name and mapping the selected channels to the probes on the associated pods. A label may contain a maximum of 32 channels, however, a single channel cannot be used under more than one label.
Page 156: Building Test Vectors And Macros
Using the Pattern Generator Building Test Vectors and Macros Building Test Vectors and Macros Once the pattern generator is configured, you will want to build programs to use in your test system. You build programs in the Sequence menu. If you have small program segments that are built from frequently used vectors, they can be built in the User Macros Sequence menu.
Page 157: To Build A Main Vector Sequence
Using the Pattern Generator Building Test Vectors and Macros To build a main vector sequence During a single run, the program vectors in the MAIN SEQUENCE are output to the system under test in an order of first vector to last vector. The data of the last vector is then held until run is selected again.
Page 158: To Build An Initialization Sequence
Using the Pattern Generator Building Test Vectors and Macros To build an initialization sequence Use the INIT SEQUENCE to place the system under test into a known initialization state. Default start and end program vectors are marked INIT SEQUENCE START and INIT SEQUENCE END. During a repetitive run, the initialization sequence is only executed the first time the program is run.
Page 159: To Edit A Main Or Initialization Sequence
Using the Pattern Generator Building Test Vectors and Macros To edit a main or initialization sequence 1 Using the knob, highlight the vector you want to edit. 2 Select the data field you want to edit. 3 Select the new instruction or change the data value.
Page 160: To Include Hardware Instructions In A Sequence
Using the Pattern Generator Building Test Vectors and Macros To include hardware instructions in a sequence The following hardware instruction types are available: • Break • Signal IMB • Wait Event • If Event 1 Highlight the vector that you want to output as a hardware instruction.
Page 161: To Include Software Instructions In A Sequence
Using the Pattern Generator Building Test Vectors and Macros To include software instructions in a sequence The following software instructions are available: • User Macro • Repeat Loop If you are inserting a User Macro and have not yet built the macro, go to "To build a user macro"...
Page 162: To Include A User Macro In A Sequence
Using the Pattern Generator Building Test Vectors and Macros To include a user macro in a sequence If you have user macros, you can include them in the vector sequence using the following procedure. (If you have not yet built user macros, turn to "To build a user macro"...
Page 163: To Build A User Macro
Using the Pattern Generator Building Test Vectors and Macros To build a user macro Build macros for sequences of vectors you will want to use in multiple places. You can then insert these macros in INIT or MAIN sequences. Give each macro a name that will help you identify its function and make it easier to select from the list of macros you’ve built.
Page 164: To Modify A Macro Name
Using the Pattern Generator Building Test Vectors and Macros To modify a macro name If you rename a macro, the new macro name will be displayed in INIT and MAIN sequences where the macro has been used. 1 Select the macro to be renamed from the list of macros. 2 Highlight the first line of the macro, then select the field.
Page 165: To Add, Delete, Or Rename Parameters
Using the Pattern Generator Building Test Vectors and Macros To add, delete, or rename parameters Parameters are set when they are inserted into MAIN or INIT sequences. The changes you make in the parameter list will appear every place in the INIT or MAIN sequences in which you have used that macro.
Page 166: To Place Parameters In A Vector
Using the Pattern Generator Building Test Vectors and Macros To place parameters in a vector Once parameters are added to the parameter list, you insert them into data fields in macro vectors. 1 From the User Macro menu, select the desired data field in a vector.
Page 167: To Enter Or Modify Parameters
Using the Pattern Generator Building Test Vectors and Macros To enter or modify parameters Each time you include a macro in an initialization or main sequence, you should enter the parameters for that particular instance. To enter or modify macro parameters, use the following procedure. 1 From the Sequence menu, highlight the line which contains the macro name, then select the field.
Page 168: To Build A User Symbol Table
Using the Pattern Generator Building Test Vectors and Macros To build a User Symbol Table You may want to build a symbol table to make inserting values into your program easier. You can name a symbol for one value in a label and insert that symbol into your vector sequence where you need it.
Page 169: To Include Symbols In A Sequence
Using the Pattern Generator Building Test Vectors and Macros To include symbols in a sequence Symbols must be created before they become available for insertion. See the task on the preceding page for more information. 1 From the Sequence menu, select the Base field under the desired label where you want a symbol used.
Page 170: To Include Symbols In A Macro
Using the Pattern Generator Building Test Vectors and Macros To include symbols in a macro In the Format menu, you assign symbols to data under a given label. Once assigned, these symbols can be included under the same label in a macro.
Page 171: To Store A Configuration
Using the Pattern Generator Building Test Vectors and Macros To store a configuration Once you have completed configuring the pattern generator, you can save that configuration to hard disk for future uses. 1 From the System menu, select Configuration. 2 Select Hard Disk. 3 Select the Store operation, then Patt Gen.
Page 172: To Load A Configuration
Using the Pattern Generator Building Test Vectors and Macros To load a configuration 1 From the System menu, select Configuration. 2 Select Hard Disk. 3 Select the Load operation, then Patt Gen. 4 Highlight the file to be loaded by rotating the knob. 5 Select Execute.
Page 173: To Use Autoroll
Using the Pattern Generator Building Test Vectors and Macros To use Autoroll When Autoroll is used, each time you complete the process of adding data to a data field, the data entry focus changes to the next specified data field. The data entry keypad remains active, ready to define the next data field.
Page 174: The Format Menu
Using the Pattern Generator Building Test Vectors and Macros The Format Menu The Format menu lets you configure the pattern generator with a clock source and parameters, generate a symbol table, select its output mode, assign which vector output channels are used, and then group and label the vector output channels.
Page 175 Using the Pattern Generator Building Test Vectors and Macros Clock Period (internal clock source) This field toggles from Clock Period, when an internal clock source is selected, to Clock Frequency, when an external clock source is selected. You select clock periods in steps of 1, 2, 2.5, 4, 5, 8, and 10. If the keypad is used to select a value between the step intervals, the value is rounded to the nearest interval.
Page 176 Using the Pattern Generator Building Test Vectors and Macros Clock Out Delay The Clock Out Delay setting allows you to position the output clock with respect to data. The zero setting is uncalibrated and should be measured to determine the initial position with respect to the data. Each numerical change of one on the counter results in an approximate change of 1.3 ns.
Page 177 Using the Pattern Generator Building Test Vectors and Macros Labels Labels let the user group output channels from the data pods into a more logical configuration for creating vector data. The pattern generator labels work in the same fashion as the labels for the logic analyzer products, with the exception that an output channel cannot be assigned to more than one label.
Page 178: The Sequence Menu
Using the Pattern Generator Building Test Vectors and Macros The Sequence Menu Use the Sequence menu to build your test vector files. There are two sequences, an initialization sequence and a main sequence. In single run mode, the vectors are output from the first vector in the initialization sequence to the last vector of the main sequence.
Page 179 Using the Pattern Generator Building Test Vectors and Macros INIT and MAIN Sequences Use the knob to highlight individual lines in either vector sequences. When a line is highlighted, you can add data lines below it by selecting the Insert field. Selecting the INST field brings up a dialog box that lets you insert one of the instructions or user macros into the vector sequence.
Page 180 Using the Pattern Generator Building Test Vectors and Macros Step Use the Step field to step through your vector sequence to debug a critical set of vectors following a break instruction in the program sequence. Stepping will begin at the vector following the break instruction, or the Output First State item can be pressed which will place the first vector of the sequence on the outputs.
Page 181 Using the Pattern Generator Building Test Vectors and Macros When deleting vector rows, the INIT START, INIT END, MAIN START, and MAIN END cannot be deleted. Deleting all the vector rows from INIT START to MAIN END will reset the sequence to the powerup state.
Page 182 Using the Pattern Generator Building Test Vectors and Macros Merge is not allowed in the following cases: • Within a repeat loop. • Within an IF block (starting with the vector prior to the if, and ending with the vector following the IF). •...
Page 183 Using the Pattern Generator Building Test Vectors and Macros Insert Selecting the Insert field adds another instruction line immediately below the line that is currently highlighted. Instructions User Macro. The User Macro instruction brings up a list of current user macros you can insert. Macros are inserted at the current line and expanded at run time.
Page 184 Using the Pattern Generator Building Test Vectors and Macros Break. The Break instruction causes a break at the current vector. In single run mode, this instruction halts the sequence and holds the outputs at the break vector’s value. In repetitive run mode, this instruction pauses the sequence at the current vector momentarily, then continues.
Page 185 Using the Pattern Generator Building Test Vectors and Macros The If event uses either the IMB or the same external clock pod input lines as the Wait event. If the condition is true at the If event, then the data in the If block is output, otherwise it is skipped. The If event takes the current data line and duplicates as in the following example: These vectors are now restricted.
Page 186 Using the Pattern Generator Building Test Vectors and Macros Data Field Selecting the data field to the right of the instruction field lets you insert vector data. ASCII-based data cannot be edited, and ASCII- and Symbols-based data cannot be autorolled. Autoroll The Autoroll field is provided to reduce the number of keystrokes required to enter data into the sequence or a macro.
Page 187: The User Macros Menu
Using the Pattern Generator Building Test Vectors and Macros The User Macros Menu The User Macros menu is used to create new macros and edit existing macros. Macro 0 is the default macro and always exists. Macros let you define a pattern sequence once, then insert the macro by name wherever it is needed.
Page 188 Using the Pattern Generator Building Test Vectors and Macros Macro 0 (current macro field) Touching this field brings up a list of macros that have been created and are available to insert into the Sequence menu. If you want to edit or view a previously built macro, select that macro from the list and it will appear in the main part of the display.
Page 189: Loading Ascii Files
Using the Pattern Generator Loading ASCII Files Loading ASCII Files You can create pattern generator files and load them as ASCII files using one of the remote communication interfaces or by loading an ASCII disk file. Regardless of the load method selected, the general format of the file must conform to certain guidelines.
Page 190: Ascii File Commands
Using the Pattern Generator ASCII File Commands ASCII File Commands In addition to the unique ASCII file commands described here, you may want to include some standard FORMat commands in the ASCII file, such as those that are used to specify the clock or output mode. The only FORMat commands that are permitted are FORMat: MODe, CLOCk, and DELay.
Page 191: Label
Using the Pattern Generator ASCII File Commands LABel Command LABel <name_str>,<width> label string, six characters maximum in length. <name_str> <width> integer number of bits in the label (1 through 32). The LABel command is a special means of specifying labels for use by an ASCII file.
Page 192: Vector
Using the Pattern Generator ASCII File Commands VECTor Command VECTor <char_count> <char_count> a ten character string starting with a ’#8’ and including the total file size count. The VECTor command is used after the end of the header/setup commands to signal the start of the actual pattern generator data in an ASCII file.
Page 193 Using the Pattern Generator ASCII File Commands No data is allowed in the same line as the VECTor command. The line termination in the VECTor command line is included in the character count for the file. The <char_count> field is not required as part of the VECTor command when creating a disk file, and will be ignored if included.
Page 194 Using the Pattern Generator ASCII File Commands Any characters that are not valid hexadecimal digits (0 through 9, or upper/lower case a through f) are ignored and treated as field separators. This could cause problems if a typo appears in the middle of a data value (for example, ’12R4’...
Page 195: Format:xxx
Using the Pattern Generator ASCII File Commands FORMat:xxx Command FORMat:MODE FORMat:CLOCk FORMat:DELay These commands transfer set fields from the Format menu. The existing clock scheme is used if nothing is specified here. Command syntax is same as normal bus commands. Examples FORMat:MODE FULL FORMat:CLOCk INT,5E-9...
Page 196: Loading An Ascii File Over A Bus (Example)
Using the Pattern Generator ASCII File Commands Loading an ASCII file over a bus (example) To load an ASCII file over the bus use the following example. A few items to be noted: • Line numbers are added for documentation only and are NOT part of the actual remote bus commands.
Page 197 Using the Pattern Generator ASCII File Commands Notes • Lines 010 through 044 can be sent as discrete remote control commands or included in a single file (with the data) and loaded using the bus. • Other format commands could be used in place of or in addition to line 030.
Page 198: Pattern Generator Probing System
Using the Pattern Generator ASCII File Commands Pattern Generator Probing System Pod Numbering The HP 1660EP-series pods are numbered as shown in the figure below. HP 1660EP Pattern Generator Pods “Probing” on page 258 for more information on the pattern generator See Also probing system.
Page 199 Triggering Examples...
Page 200: Triggering Examples
Triggering Examples Triggering Examples Triggering Examples As you begin to understand a problem in your system, you may realize that certain conditions must occur before the problem occurs. You can use sequential triggering to ensure that those conditions have occurred before the analyzer recognizes its trigger and captures information.
Page 201: Single-Machine Trigger Examples
Triggering Examples Single-Machine Trigger Examples Single-Machine Trigger Examples The following examples require only a single analyzer to make measurements. Sequence specifications are given in the form you see within the sequence levels, but the illustrations show the complete, multi-level sequence specification. Although all the examples are case-specific, terms are named in a way that highlights their role in solving the trigger problem.
Page 202: To Store And Time The Execution Of A Subroutine
Triggering Examples Single-Machine Trigger Examples To store and time the execution of a subroutine Most system software of any kind is composed of a hierarchy of functions and procedures. During integration, testing, and performance evaluation, you want to look at specific procedures to verify that they are executing correctly and that the implementation is efficient.
Page 203 Triggering Examples Single-Machine Trigger Examples The figure below shows what you would see on your analyzer screen after entering the sequence specification given in step 4. Trigger Setup for Storing and Timing Execution of a Subroutine Suppose you want to trigger on entry to a routine called MY_SUB. You can create a symbol from the address of MY_SUB in the Format menu, allowing you to reference the symbol name when setting up the trace specification.
Page 204: To Trigger On The Nth Iteration Of A Loop
Triggering Examples Single-Machine Trigger Examples To trigger on the nth iteration of a loop Traditional debugging requires print statements around the area of interest. This is not possible in most embedded systems designs, but the analyzer lets you view the system’s behavior when a particular event occurs.
Page 205 Triggering Examples Single-Machine Trigger Examples The specification has some advantages and a potential problem. • The advantages are that a pipelined processor won't trigger until it has executed the loop 10 times. Requiring LP_END to be seen at least once first ensures that the processor actually entered the loop;...
Page 206: To Trigger On The Nth Recursive Call Of A Recursive Function
Triggering Examples Single-Machine Trigger Examples To trigger on the nth recursive call of a recursive function 1 Go to the state analyzer’s Trigger menu. 2 Define the terms CALL_ADD, F_START, and F_END to represent the called address of the recursive function, and the start and end addresses of the function.
Page 207 Triggering Examples Single-Machine Trigger Examples 5 Insert another sequence level before the current one. Select the User Level macro and enter the following specification: • While storing "no state" Find "F_END" occurs "1" Else on "no state" go to level 1. As with the trigger specification for "To trigger on the nth iteration of a loop,"...
Page 208: To Trigger On Entry To A Function
Triggering Examples Single-Machine Trigger Examples To trigger on entry to a function This sequence triggers on entry to a function only when it is called by one particular function. 1 Go to the state analyzer’s Trigger menu. 2 Define the terms F1_START and F1_END to represent the start and end addresses of the calling function.
Page 209 Triggering Examples Single-Machine Trigger Examples The specification also stores all execution inside function F1, whether or not F2 was called. If you are interested only in the execution of F1, without the code that led to its invocation, you can change the storage specification from "anystate"...
Page 210: To Capture A Write Of Known Bad Data To A Particular Variable
Triggering Examples Single-Machine Trigger Examples To capture a write of known bad data to a particular variable The trigger specification ANDs the bad data on the data bus, the write transaction on the status bus, and the address of the variable on the address bus.
Page 211: To Trigger On A Loop That Occasionally Runs Too Long
Triggering Examples Single-Machine Trigger Examples To trigger on a loop that occasionally runs too long This example assumes the loop normally executes in 14 ms. 1 Go to the state analyzer’s Trigger menu. 2 Define terms LP_START and LP_END to represent the start and end addresses of the loop, and set Timer1 to the normal duration of the loop.
Page 212: To Verify Correct Return From A Function Call
Triggering Examples Single-Machine Trigger Examples To verify correct return from a function call The exit code for a function will often contain instructions for deallocating stack storage for local variables and restoring registers that were saved during the function call. Some language implementations vary on these points, with the calling function doing some of this work, so you may need to adapt the procedure to suit your system.
Page 213: To Trigger After All Status Bus Lines Finish Transitioning
Triggering Examples Single-Machine Trigger Examples To trigger after all status bus lines finish transitioning In some applications, you will want to trigger a measurement when a particular pattern has become stable. For example, you might want to trigger the analyzer when a microprocessor’s status bus has become stable during the bus cycle.
Page 214: To Find The Nth Assertion Of A Chip Select Line
Triggering Examples Single-Machine Trigger Examples To find the nth assertion of a chip select line 1 Go to the timing analyzer’s Trigger menu. 2 Define the Edge1 term to represent the asserting transition on the chip select line. You can rename the Edge1 term to make it correspond more closely to the problem domain, for example, to CHIP_SEL.
Page 215: To Verify That The Chip Select Line Is Strobed After The Address Is Stable
Triggering Examples Single-Machine Trigger Examples To verify that the chip select line is strobed after the address is stable 1 Go to the timing analyzer’s Trigger menu. 2 Define a term called ADDRESS to represent the address in question and the Edge1 term to represent the asserting transition on the chip select line.
Page 216: To Trigger When Expected Data Does Not Appear When Requested
Triggering Examples Single-Machine Trigger Examples To trigger when expected data does not appear when requested 1 Go to the timing analyzer’s Trigger menu. 2 Define a term called DATA to represent the expected data, the Edge1 term to represent the chip select line of the remote device, and the Timer1 term to identify the time limit for receiving expected data.
Page 217 Triggering Examples Single-Machine Trigger Examples This sequence specification causes the analyzer to trigger when the data does not occur in 16 ms or less. If it does occur within 16 ms, the sequence restarts. Specifications of this type are useful in finding intermittent problems.
Page 218: To Test Minimum And Maximum Pulse Limits
Triggering Examples Single-Machine Trigger Examples To test minimum and maximum pulse limits 1 Go to the timing analyzer’s Trigger menu. 2 Define the Edge1 term to represent the positive-going transition, and define the Edge2 term to represent the negative-going transition on the line with the pulse to be tested. You can rename these terms to POS_EDGE and NEG_EDGE.
Page 219 Triggering Examples Single-Machine Trigger Examples Because both timers start when entering sequence level 2, they start as soon as the positive edge of the pulse occurs. Once the negative edge occurs, the sequencer transitions to level 3. If at that point, the MIN_WID timer is less than 496 ns or the MAX_WID timer is greater than 1 ms, the pulse width has been violated and the analyzer triggers.
Page 220: To Detect A Handshake Violation
Triggering Examples Single-Machine Trigger Examples To detect a handshake violation 1 Go to the timing analyzer’s Trigger menu. 2 Define the Edge1 term to represent either transition on the first handshake line, and the Edge2 term to represent either transition on the second handshake line. You can rename these terms to match your problem, for example, to REQ and ACK.
Page 221: To Detect Bus Contention
Triggering Examples Single-Machine Trigger Examples To detect bus contention In this setup, the trigger occurs only if both devices assert their bus transfer acknowledge lines at the same time. 1 Go to the timing analyzer’s Trigger menu. 2 Define the Edge1 term to represent assertion of the bus transfer acknowledge line of one device, and Edge2 term to represent assertion of the bus transfer acknowledge line of the other device.
Page 222: Cross-Arming Trigger Examples
Triggering Examples Cross-Arming Trigger Examples Cross-Arming Trigger Examples The following examples use cross arming to coordinate measurements between two separate analyzers within the logic analyzer or between analyzers and the oscilloscope. The analyzers can be configured as either a state analyzer and timing analyzer, or two state analyzers. It is not possible to set both to timing.
Page 223: To Examine Software Execution When A Timing Violation Occurs
Triggering Examples Cross-Arming Trigger Examples To examine software execution when a timing violation occurs The timing analyzer triggers when the timing violation occurs. When it triggers, it also sets its "arm" level to true. When the state analyzer receives the arm signal, it triggers immediately on the present state. 1 Set up one state analyzer and one timing analyzer.
Page 224 Triggering Examples Cross-Arming Trigger Examples 6 Under State Sequence Levels, enter the following sequence specification: • While storing "anystate" TRIGGER on "arm s a" Occurs "1" Else on "no state" go to level "1"...
Page 225: To Look At Control And Status Signals During Execution Of A Routine
Triggering Examples Cross-Arming Trigger Examples To look at control and status signals during execution of a routine The state analyzer will trigger on the start of the routine whose control and status signals are to be examined more frequently than once per bus cycle.
Page 226: To Detect A Glitch
Triggering Examples Cross-Arming Trigger Examples To detect a glitch The following setup uses a state analyzer to capture state flow occurring at the time of the glitch. This can be useful in troubleshooting. For example, you might find that the glitch is ground bounce caused by a number of simultaneous signal transitions.
Page 227: To Capture The Waveform Of A Glitch Using The Oscilloscope (1660Es-Series Only)
Triggering Examples Cross-Arming Trigger Examples To capture the waveform of a glitch using the oscilloscope (1660ES-series only) The following setup uses the triggering capability of the timing analyzer and the acquisition capability of the oscilloscope. 1 Set up a timing analyzer. Go to the timing analyzer’s Format menu and set the Timing Acquisition Mode to Glitch Hold Channel 125 MHz.
Page 228: To View Your Target System Processing An Interrupt (1660Es-Series Only)
Triggering Examples Cross-Arming Trigger Examples To view your target system processing an interrupt (1660ES-series only) Use the oscilloscope to trigger on the asynchronous interrupt request. 1 Go to the state analyzer’s Trigger menu, and set the analyzer to trigger on any state and store any state. 2 Select Arming Control.
Page 229: To Trigger Timing Analysis Of A Count-Down On A Set Of Data Lines
Triggering Examples Cross-Arming Trigger Examples To trigger timing analysis of a count-down on a set of data lines Your target system may include various state machines that are started by system events such as interrupt processing or I/O activity. The state analyzer is ideal for recognizing the system events;...
Page 230: To Monitor Two Coprocessors In A Target System
Triggering Examples Cross-Arming Trigger Examples To monitor two coprocessors in a target system Debugging coprocessor systems can be a complex task. Replicated systems and contention for shared resources increase the potential problems. Using two state analyzers with analysis probes can make it much easier to discover the source of such problems.
Page 231 Triggering Examples Cross-Arming Trigger Examples 7 Check that the second analyzer is triggering on arm and that Count Time is set. After the measurement is complete, you can interleave the trace lists of both state analyzers to see the activity executed by both coprocessors during related clock cycles.
Page 232: Special Displays
Triggering Examples Special Displays Special Displays Interleaved trace lists Interleaved trace lists allow you to view data captured by two analyzers in a single display. When you interleave the traces, you see each state that was captured by each analyzer. These states are shown on consecutive lines.
Page 233: To Interleave Trace Lists
Triggering Examples Special Displays To interleave trace lists 1 Set up both analyzers as state analyzers. 2 Go to the Trigger menu of the first analyzer. 3 Set Count to Time, and set up the trigger. The logic analyzer uses the time tags stored with each state to determine the ordering of states shown in an interleaved trace list.
Page 234 Triggering Examples Special Displays 8 Select the name of the other analyzer and the label to interleave. Interleaved data is displayed in a light shade. Trace list line numbers of interleaved data are indented. The labels identifying the interleaved data are shown above the labels for the current analyzer, and are displayed in a light shade.
Page 235: To View Trace Lists And Waveforms On The Same Display
Triggering Examples Special Displays To view trace lists and waveforms on the same display 1 Set up a timing and a state analyzer. 2 Go to the state analyzer’s Trigger menu. 3 Set Count to Time, and set up the trigger as appropriate. You do not need to have one instrument arming the other to display the information jointly, but you do need to turn on Count Time so that the information may be correlated.
Page 236 Triggering Examples Special Displays You cannot view state analyzer data in the waveform display. However, you can view timing analyzer data and oscilloscope data simultaneously. You can also position X and O Time markers on the waveform display. Once set, the time markers will be displayed in both the listing and the waveform display areas.
Page 237 File Management...
Page 238: File Management
File Management File Management File Management Being able to transfer data to a host computer, such as a PC or UNIX workstation, can enhance the logic analyzer in many ways. You can use the host to store configuration files or measurement results for later review.
Page 239: Transferring Files Using The Flexible Disk Drive
File Management Transferring Files Using the Flexible Disk Drive Transferring Files Using the Flexible Disk Drive Because the flexible disk drive on the HP 1660/70-series logic analyzers will read and write double-sided, double-density, or high-density disks in MS-DOS format, it is a useful tool for transferring data to and from IBM PC-compatible computers as well as transferring data to and from other systems that can read and write MS-DOS format.
Page 240: To Save A Configuration
File Management Transferring Files Using the Flexible Disk Drive To save a configuration You can save configurations on a 3.5-inch disk or on the internal hard disk for later use. This is especially useful for automating repetitive measurements for production testing. 1 Go to the System Hard Disk or System Flexible Disk menu.
Page 241 File Management Transferring Files Using the Flexible Disk Drive Saving the System Configuration for Programmatic Control...
Page 242: To Load A Configuration
File Management Transferring Files Using the Flexible Disk Drive To load a configuration You can quickly load a previously saved configuration, so that you will not have to manually set up the measurement parameters. 1 Go to the System Hard Disk or System Flexible Disk menu. Your choice here depends on where you saved the configuration.
Page 243 File Management Transferring Files Using the Flexible Disk Drive 5 Select Execute. Loading System Configuration for Programmatic Control...
Page 244: To Save A Trace List In Ascii Format
File Management Transferring Files Using the Flexible Disk Drive To save a trace list in ASCII format Some screens, such as file lists and trace lists, contain columns of ASCII data that you may want to move to a computer for further manipulation or analysis.
Page 245: To Save A Screen's Image
File Management Transferring Files Using the Flexible Disk Drive To save a screen’s image You can save menus and measurements to disk in one of four different graphical formats. 1 Insert a formatted flexible disk in the flexible disk drive. 2 Set up the menu whose image you want to capture, or run a measurement from which you want to save data.
Page 246: To Load Additional Software
File Management Transferring Files Using the Flexible Disk Drive 6 Select Flexible Disk from the Output Disk menu, then select Execute. Print Disk Menu To load additional software You can enhance the power of your HP 1660/70-series logic analyzer by installing software such as symbol utilities.
Page 247: Transferring Files Using The Lan
File Management Transferring Files Using the LAN Transferring Files Using the LAN The HP 1660E/ES/EP and 1670E-series logic analyzers come equipped with a LAN interface. You can transfer information from the logic analyzer to a computer for processing or storage over the LAN without ever copying a file to disk.
Page 248: To Transfer Files Using Ftp
File Management Transferring Files Using the LAN To transfer files using ftp 1 Check that your network package include ftp, and connect your logic analyzer to the LAN. See the LAN section of this User’s Guide on page 494 for instructions. 2 From the computer you want to transfer the files to or from, establish an ftp connection.
Page 249: Logic Analyzer Reference
Logic Analyzer Reference...
Page 250: Hp 1660E/Es/Ep-Series Logic Analyzer Description
Logic Analyzer Reference HP 1660E/ES/EP-Series Logic Analyzer Description HP 1660E/ES/EP-Series Logic Analyzer Description The HP 1660E/ES/EP-series logic analyzers are part of a family of general-purpose logic analyzers. The HP 1660E-series consists of four models ranging in channel width from 34 channels to 136 channels, with 100-MHz state and 500-MHz timing speeds.
Page 251 Logic Analyzer Reference HP 1660E/ES/EP-Series Logic Analyzer Description The 500-MHz timing analyzer has conventional, transitional, and glitch timing modes with variable width, depth, and speed selections. Sequential triggering uses 10 sequence levels with two-way branching, 10 pattern resource terms, 2 range terms, 2 edge terms and 2 timers. The 2 GSa/s oscilloscope has immediate, edge, and pattern trigger modes.
Page 252: Hp 1660E/Es/Ep-Series Configuration Capabilities
Logic Analyzer Reference HP 1660E/ES/EP-Series Configuration Capabilities HP 1660E/ES/EP-Series Configuration Capabilities The four analyzer models in each of the HP 1660E/ES/EP-series offer a wide variety of channel widths and memory depth combinations. The number of data channels range from 34 channels with the HP 1663E/ES/EP, to a maximum of 136 channels with the HP 1660E/ES/EP.
Page 253 Logic Analyzer Reference HP 1660E/ES/EP-Series Configuration Capabilities Timing Analyzer Configurations Mode HP 1660E/ES/EP HP 1661E/ES/EP HP 1662E/ES/EP HP 1663E/ES/EP Conventional 8K-deep / 68 chan. 8K-deep / 51 chan. 8K-deep / 34 chan. 8K-deep / 17 chan. half-channel 65 data + 3 data or 48 data + 3 data or 32 data + 2 data or 16 data + 1 data or...
Page 254: Hp 1670E-Series Logic Analyzer Description
Logic Analyzer Reference HP 1670E-Series Logic Analyzer Description HP 1670E-Series Logic Analyzer Description The HP 1670E-series logic analyzers are part of a family of general- purpose logic analyzers. The HP 1670E-series consists of three models ranging in channel width from 68 channels to 136 channels, with 100- MHz state and 250-MHz timing speeds.
Page 255: Hp 1670E-Series Configuration Capabilities
Logic Analyzer Reference HP 1670E-Series Logic Analyzer Description HP 1670E-Series Configuration Capabilities The three analyzer models in the HP 1670E-series offer a variety of channel widths and memory depth combinations. The number of data channels range from 68 channels with the HP 1672E, up to 136 channels with the HP 1670E.
Page 256 Logic Analyzer Reference HP 1670E-Series Logic Analyzer Description Analyzer Memory Depth and Channel Configurations Channel Mode Memory Configuration HP 1670E HP 1671E HP 1672E 1,040,384 136 chan. 132 data + 4 102 chan. 98 68 chan. 64 state 100 MHz 516,096 data or clock data + 4 data...
Page 257 Logic Analyzer Reference HP 1670E-Series Logic Analyzer Description State Compare Configuration Considerations • With standard memory, memory depth is reduced by half whether tags are turned on or off. With extended memory option, memory depth is one half with tags turned off and one fourth with tags turned on. Timing Analyzer Configuration Considerations •...
Page 258: Probing
Logic Analyzer Reference Probing Probing This section discusses the probing system for the logic analyzer. It also contains the information you need for connecting the probe system components to each other, to the logic analyzer, to the oscilloscope, to the pattern generator, and to the system under test. Probing Options You can connect the logic analyzer to your system under test in one of the following ways:...
Page 259 Logic Analyzer Reference Probing Microprocessor and Bus-Specific Interfaces There are a number of microprocessor- and bus-specific interfaces available as optional accessories. Microprocessors are supported by Universal Interfaces or Analysis Probes, or in some cases, both. Universal Interfaces are manufactured by other vendors. Universal Interfaces are aimed at initial hardware turn-on, and provide fast, reliable, and convenient connections to the microprocessor system.
Page 260 Logic Analyzer Reference Probing The Termination Adapter The logic analyzer must be properly terminated to operate correctly. Most HP analysis probes have properly terminated state connectors; however, many of them require termination adapters for the timing connectors. The optional termination adapter lets you connect the logic analyzer probe cables directly to test ports on your target system without the probes.
Page 261: General-Purpose Probing System Description
Logic Analyzer Reference Probing General-purpose probing system description The standard probing system provided with the logic analyzer consists of a probe tip assembly, probe cable, and grabbers. Because of the passive design of the probes, there are no active circuits at the outer end of the cable.
Page 262 Logic Analyzer Reference Probing Probe and Pod Grounding Each pod is grounded by a long, black, pod ground lead. You can connect the ground lead directly to a ground pin on your target system or use a grabber. To connect the ground lead to grounded pins on your target system, you must use 0.63-mm (0.025-in) square pins, or use round pins with a diameter of 0.66 mm (0.026 in) to 0.84 mm (0.033 in).
Page 263 Logic Analyzer Reference Probing Grabbers The grabbers have a small hook that fits around the IC pins and component leads. The grabbers have been designed to fit on adjacent IC pins on either through-hole or surface-mount components with lead spacing greater than or equal to 0.050 inches. Probe Cable The probe cable contains 18 signal lines, 17 chassis ground lines and two power lines for analysis probe use.
Page 264 Logic Analyzer Reference Probing Maximum Probe Input Voltage The maximum input voltage of each logic analyzer probe is 40 volts peak. Pod Thresholds Logic analyzer pods have two preset thresholds and a user-definable pod threshold. The two preset thresholds are ECL (-1.3 V) and TTL (+1.5 V).
Page 265: Assembling The Probing System
Logic Analyzer Reference Probing Assembling the probing system The general-purpose probing system components are assembled as shown to make a connection between the measured signal line and the pods displayed in the Analyzer Format menu. Connecting Probe Cables to the Logic Analyzer...
Page 266 Logic Analyzer Reference Probing Connecting Probe Cables to the Logic Analyzer All probe cables are installed at Hewlett-Packard. If you need to replace a probe cable, refer to the HP 1660E/ES/EP-series or the 1670E-Series Logic Analyzers Service Guide. You can purchase the Service Guide from your HP Sales Office.
Page 267 Logic Analyzer Reference Probing Disconnecting Probe Leads from Probe Tip Assemblies When you receive the logic analyzer, the probe leads are already installed in the probe tip assemblies. To keep unused probe leads out of your way during a measurement, you can disconnect them from the pod.
Page 268 Logic Analyzer Reference Probing Connecting the Grabbers to the Probes Connect the grabbers to the probe leads by slipping the connector at the end of the probe onto the recessed pin located in the side of the grabber. If you need to use grabbers for either the pod or the probe grounds, connect the grabbers to the ground leads in the same manner.
Page 269: Oscilloscope Probes
Logic Analyzer Reference Probing Oscilloscope probes The two oscilloscope probes supplied with the logic analyzer are HP 1160A Miniature Passive Probes. These small, lightweight probes allow measurements that were previously very difficult in densely populated circuits. For complete information on the operation, maintenance, and adjustments of the miniature passive probes, be sure to read the operating note that is packaged with the probes.
Page 270: Connecting The Pattern Generator Pods Directly To A Pc Board
Logic Analyzer Reference Probing Connecting the pattern generator pods directly to a PC board To connect the pattern generator pods directly to the PC board, use one of the following two methods. Both methods require that a 3M 2520-series, or similar alternative connector be installed on the PC board.
Page 271: Pattern Generator Output Pod Characteristics
Logic Analyzer Reference Probing Pattern generator output pod characteristics The following equivalent circuit information is provided to help you select the appropriate clock and data pods for your application. HP 10461A TTL Data Pod Output type 10H125 with 100 ohm in series Maximum clock 200 MHz Skew...
Page 272 Logic Analyzer Reference Probing HP 10464A ECL Data Pod (terminated) Output type 10H115 with 330 ohm pulldown, 47 ohm in series Maximum clock 200 MHz Skew Typical <1 ns; worst case 2 ns (see note 1) Recommended lead set HP 10474A HP 10465A ECL Data Pod (unterminated) Output type 10H115 (no termination)
Page 273 Logic Analyzer Reference Probing HP 10466A 3-State TTL/3.3 Volt Data Pod Output type 74LVT244 with 100 ohm in series 10H125 on non 3-state channel 7 (see note 2) 3-state enable negative true, 100K ohm to GND, enabled on no connect Maximum clock 200 MHz Skew...
Page 274 Logic Analyzer Reference Probing Data Cable Characteristics Without a Data Pod The HP 1660EP-series data cables without a data pod provide an ECL- terminated (1 KW to -5.2 V) differential signal. These are usable when received by a differential receiver, preferably with a 100-ohm termination across the lines.
Page 275 Logic Analyzer Reference Probing HP 10460A TTL Clock Pod Clock output type 10H125 with 47 ohm series; true & inverted Clock output rate 100 MHz maximum Clock out delay 11 ns maximum in 9 steps Clock input type TTL - 10H124 Clock input rate DC to 100 MHz Pattern input type...
Page 276 Logic Analyzer Reference Probing HP 10463A ECL Clock Pod Clock output type 10H116 differential unterminated; and differential with 330 ohm to -5.2v and 47 ohm series Clock output rate 200 MHz maximum Clock out delay 11 ns maximum in 9 steps Clock input type ECL - 10H116 with 50 KW to -5.2 V Clock input rate...
Page 277: Keyboard Shortcuts
Logic Analyzer Reference Keyboard Shortcuts Keyboard Shortcuts This section explains how to use the optional keyboard interface (HPE2427B Keyboard Kit). You can use the keyboard interchangeably with the knob and front-panel keypad for all menu applications. The keyboard functions fall into the two basic categories of cursor movement and data entry.
Page 278: Entering Data Into A Menu
Logic Analyzer Reference Keyboard Shortcuts Page Up and Page Down keys The Page Up and Page Down keys page through listings. The Page Up key displays the previous page of data. The Page Down key displays the next page of data. Selecting a menu item To select a menu item with the keyboard, position the cursor (the location highlighted in inverse video) on the menu item and press the...
Page 279: Using The Keyboard Overlays
Logic Analyzer Reference Keyboard Shortcuts Using the keyboard overlays A keyboard overlay is included in the HP E2427B Keyboard Kit. The table below represents the key mappings. Functions Like Functions Like System Key Select "seconds" Config Key Select "milliseconds" or "millivolts" Format Key Select "microseconds"...
Page 280: Common Menu Fields
Logic Analyzer Reference Common Menu Fields Common Menu Fields There are a number of fields that appear throughout the different menus that have similar operation. These common fields are listed below: • Mode (System/Analyzer) field • Menu field • Print field •...
Page 281: Print Field
Logic Analyzer Reference Common Menu Fields Print field The Print field prints what is displayed on the screen at the time you initiate the printout. When you select the Print field, a print selection pop-up appears showing you one or more of the following options: •...
Page 282 Logic Analyzer Reference Common Menu Fields Print Disk The Print Disk option copies the screen in graphical form or ASCII, if available, to a file on either drive. Possible output formats are • ASCII 8-bit standard ASCII text file • B/W TIF Black-and-white image in TIFF version 5.0 format •...
Page 283: Run/Stop Field
Logic Analyzer Reference Common Menu Fields Run/Stop field The Run field starts the analyzer measurement. When you select Run, the screen switches to the display menu last viewed and displays the acquired data. If Stop is selected during a single run, the data acquisition is aborted.
Page 284: Roll Fields
Logic Analyzer Reference Common Menu Fields Roll fields Some data may not fit on screen when there are many pods or labels to display. When this happens, it is indicated by the Label/Base field becoming selectable and its shade changing to the common field shade. To move through the hidden data, select the field, wait for the roll indicator to appear, and then use the knob to move through the data.
Page 285: Disk Drive Operations
Logic Analyzer Reference Disk Drive Operations Disk Drive Operations The logic analyzer has a built-in 3.5-inch, double-sided, high-density or double-density, flexible disk drive. The disk drive is compatible with both LIF (Logical Interchange Format) and DOS (Disk Operating System) formats. It also has an internal hard disk drive, which performs the same operations as the flexible disk drive.
Page 286 Logic Analyzer Reference Disk Drive Operations • Format Disk Formats a flexible disk or the internal hard disk. Either can be formatted in LIF or DOS format. All files on the disk will be destroyed with this operation. • Load Loads a file into the logic analyzer, overwriting the current settings or information.
Page 287 Logic Analyzer Reference Disk Drive Operations • Store Saves system and analyzer measurement setups including data. Disk operation safeguards If there is a problem or additional information is needed to execute an operation, a pop-up appears near the center of the screen displaying the status of the operation.
Page 288: Autoload
Logic Analyzer Reference Disk Drive Operations Autoload The Autoload operation allows you to designate a set of configuration files to be loaded automatically the next time the analyzer is turned on. This allows you to change the default configuration of certain features to one that better fits your needs.
Page 289: Pack
Logic Analyzer Reference Disk Drive Operations Pack By purging files from the disk and adding other files, you may end up with blank areas on the disk (between files) that are too small for the new files you are creating. On LIF disks, the Pack Disk operation packs the current files together, removing unused areas from between the files so that more space is available for files at the end of the disk.
Page 290: Load And Store
Logic Analyzer Reference Disk Drive Operations Load and Store When you choose Load or Store, you next need to set the field immediately to the right. This field presents at least three choices: All, System, and Analyzer. If you have other software loaded, it might add to the list of choices.
Page 291 Logic Analyzer Reference Disk Drive Operations Oscilloscope Oscilloscope configuration files store measurement setups, including data. Attributes stored in scope configuration files include labels, trigger sequence, arming configuration, measurement data, markers, and channel assignments. Oscilloscope configuration files end in “._B” and have a file type of 166Xsc_config. Pattern Generator Pattern generator files store the configuration attributes and parameters of the pattern generator, including vectors and macros,...
Page 292: The Rs-232-C, Hp-Ib, And Centronics Interfaces
Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces The RS-232-C, HP-IB, and Centronics Interfaces This section describes the controller and printer interfaces and their configurations found in the System External I/O menu. It defines the HP-IB interface and describes how to select a different HP-IB address. It also defines the RS-232-C interface and tells you how to select a baud rate, how to change the stop bits, how to set the parity and data bits, and how to change the flow control protocol.
Page 293: The Hp-Ib Interface
Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces The HP-IB interface The Hewlett-Packard Interface Bus (HP-IB) is Hewlett-Packard’s implementation of IEEE Standard 488-1978, "Standard Digital Interface for Programmable Instrumentation." HP-IB is a carefully defined interface that simplifies the integration of various instruments and computers into systems.
Page 294: The Rs-232-C Interface
Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces The RS-232-C interface The RS-232-C interface is Hewlett-Packard’s implementation of EIA Recommended Standard RS-232-C, "Interface Between Data Terminal Equipment and Data Communications Equipment Employing Serial Binary Data Interchange." With this interface, data is sent one bit at a time and characters are not synchronized with preceding or subsequent data characters.
Page 295: The Centronics Interface
Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces Data Bits Data Bits are the number of bits used to represent the binary code of a character. The HP 1660EP-series logic analyzers support 8-bit binary code. Protocol Protocol governs the flow of data between the instrument and the external device.
Page 296: The Ethernet Lan Interface
Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces The Ethernet LAN interface The LAN interface is Hewlett-Packard’s implementation of IEEE standard 802.3 (ISO 88002-3), “Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer Specifications.” This network protocol is commonly referred to as Ethernet.
Page 297 Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces LAN Port There are two ports for connecting the logic analyzer to LAN. The LAN TP port is for a twisted pair network, sometimes known as ethertwist or 10Base-T. The LAN BNC port is for a coaxial cable network, sometimes know as thinlan or 10Base2.
Page 298 Logic Analyzer Reference The RS-232-C, HP-IB, and Centronics Interfaces Help with... These buttons provide additional information on the LAN settings screen, hosts table, and PC settings. Show LAN Connections This field pops up a list of all connections to the logic analyzer, and some information as to the type of connection.
Page 299: System Utilities
Logic Analyzer Reference System Utilities System Utilities The System Utilities menu is used for setting system level parameters such as the system clock, display intensity for each shade, and the sound. In this menu you can also rewrite the analyzer’s memory with any new revisions of the operating system.
Page 300: Update Flash Rom Field
Logic Analyzer Reference System Utilities Update FLASH ROM field The logic analyzer uses flash ROMs to store the operating system. The analyzer you received should have an operating system in place and should also include the operating system files on a flexible disk, but you may occasionally need to update the operating system.
Page 301 Logic Analyzer Reference System Utilities If you press a key other than Done, the logic analyzer will not pause for you to insert the second disk when it finishes copying files from the first disk. Instead, it will look on the hard drive under the /SYSTEM directory.
Page 302: Display Color Selection
Logic Analyzer Reference Display Color Selection Display Color Selection The color selection feature allows you to customize display colors, which improves contrast and lessens eye fatigue caused by your operating environment. If you are color-blind to certain colors, are operating in a difficult light environment, or don’t like the default colors, you can quickly and easily change them.
Page 303 Logic Analyzer Reference Display Color Selection White is the center of the top of the cylinder (Luminosity = 100%, Saturation = 0%). The center line of the cylinder (Saturation = 0%) is a line which connects the center of the black plane (Luminosity = 0%, Saturation = 0%) with white (Luminosity = 100%, Saturation = 0%) through a series of gray steps (Luminosity from 0% to 100%, Saturation = 0%).
Page 304: Setting The Color, Hue, Saturation, And Luminosity Fields
Logic Analyzer Reference Display Color Selection Setting the Color, Hue, Saturation, and Luminosity Fields To set the Color, Hue, Saturation, or Luminosity fields, see if the field you want has a different background than the other fields (light blue if using default colors).
Page 305: The Analyzer Configuration Menu
Logic Analyzer Reference The Analyzer Configuration Menu The Analyzer Configuration Menu Type field The Type field lets you configure the logic analyzer with either an internal clock (Timing mode) or an external clock (State and SPA). When the Type field is selected, the following choices are available. Timing.
Page 306: Illegal Configuration
Logic Analyzer Reference The Analyzer Configuration Menu Illegal configuration When both analyzers are turned on, the first pod pair 1,2 and the last pod pair (for example: 5,6 in the 96-channel model or 7,8 in the 128- channel model) cannot be assigned to the same analyzer machine. If this configuration is set, the analyzer will display a re-assignment menu when you try to leave the configuration screen.
Page 307: The Analyzer Format Menu
Logic Analyzer Reference The Analyzer Format Menu The Analyzer Format Menu Pod threshold field The pod threshold field is used to set a voltage level that the data must reach before the analyzer recognizes and displays it as a change in logic levels.
Page 308: State Acquisition Modes (Hp 1660E/Es/Ep-Series State Only)
Logic Analyzer Reference The Analyzer Format Menu State acquisition modes (HP 1660E/ES/EP-series state only) The State Acquisition Mode field identifies the channel width and memory depth of the selected acquisition mode. There are two configurations of channel width/memory depth. Full Channel/4K Memory/100 MHz Full-channel mode uses both pods in a pod pair for 34 channels of width and a total memory depth of 4 K per channel.
Page 309: Timing Acquisition Modes (Hp 1660E/Es/Ep-Series Timing Only)
Logic Analyzer Reference The Analyzer Format Menu Timing acquisition modes (HP 1660E/ES/EP-series timing only) The Timing Acquisition mode field identifies the acquisition type, the channel width, and sampling speed of the present acquisition mode. There are three acquisition modes and five configurations. Conventional Acquisition Mode In Conventional Acquisition mode, the analyzer stores measurement data at each sampling interval.
Page 310 Logic Analyzer Reference The Analyzer Format Menu Transitional full-channel 125 MHz The total memory depth is 4 K per channel with 34 channels per pod pair. Data is sampled for new transitions as often as every 8 ns. Transitional half-channel 250 MHz The total memory depth is 8 K with 17 channels on one pod.The pod used within the pod pair is selectable.
Page 311: Acquisition Modes (Hp 1670E-Series)
Logic Analyzer Reference The Analyzer Format Menu Acquisition modes (HP 1670E-series) The Acquisition mode field identifies the channel width and sampling speed of the present acquisition mode. There are two timing acquisition modes. State analyzers only have one acquisition mode. Full-channel 125 MHz.
Page 312: Clock Inputs Display
Logic Analyzer Reference The Analyzer Format Menu Clock Inputs Display Beneath the Clock Inputs display (Data on clks for the 1670E-series), and next to the activity indicators, is a group of all clock inputs available in the present configuration. The number of available clocks depends on the model.
Page 313: Pod Clock Field (State Only)
Logic Analyzer Reference The Analyzer Format Menu Pod clock field (State only) The pod clock field identifies the type of clock arrangement assigned to each pod. When the pod clock field is selected, a clock arrangement menu appears with the choices of Master, Slave, or Demultiplex. Once a pod clock is assigned a clock arrangement, its identity and function follows what is configured in the Master and Slave Clock fields.
Page 314 Logic Analyzer Reference The Analyzer Format Menu Analyzer Memory latches on master clock latches on Slave Latch slave clock data on master data on slave Latching Slave Data...
Page 315 Logic Analyzer Reference The Analyzer Format Menu Demultiplex The Demultiplex mode is used to store two different sets of data that occur at different times on the same channels. In Demultiplex mode both the master and slave clocks are used, but only one pod of the pod pair is sampled.
Page 316: Master And Slave Clock Fields (State Only)
Logic Analyzer Reference The Analyzer Format Menu Master and Slave Clock fields (State only) The Master and Slave Clock fields are used to construct a clocking arrangement. A clocking arrangement is the assignment of appropriate clocks, clock edges, and clock qualifier levels which allow the analyzer to synchronize itself on valid data.
Page 317 Logic Analyzer Reference The Analyzer Format Menu Clock edges are ORed to clock edges, clock qualifiers are ANDed to clock edges, and clock qualifiers can be either ANDed or ORed together. All clock and qualifier combinations on the left side of the graphic line are ORed to all combinations on the right side of the line.
Page 318 Logic Analyzer Reference The Analyzer Format Menu Setup/Hold field Setup/Hold in the Master and Slave Clock fields adjusts the relative position of the clock edge with respect to the time period that data is valid. When the Setup/Hold field is selected, a configuration menu appears.
Page 319: Symbols Field
Logic Analyzer Reference The Analyzer Format Menu Symbols field The Symbols field is located directly below the Run field in the upper right corner of the Format menu. Use this field to access the symbol tables. Use symbol tables to define a mnemonic for a specific bit pattern of a label.
Page 320 Logic Analyzer Reference The Analyzer Format Menu Base field Use the Base field to select the numeric base in which the pattern in the symbols menu is displayed. Binary is not available if more than 20 channels are assigned to a label because there is only enough room for 20 bits to be displayed on the screen.
Page 321: Label Fields
Logic Analyzer Reference The Analyzer Format Menu Label fields The label fields are the fields with label names along the left side of the display below the field captioned Labels. The default label names are Lab1 through Lab126. Selecting the label fields pops up a choice of Turn Label On, Turn Label Off, and Modify Label.
Page 322: Label Polarity Fields
Logic Analyzer Reference The Analyzer Format Menu Label polarity fields The label polarity fields, which are located just after the label, are used to assign a polarity to each label. The default polarity for all labels is positive (+). You change the label polarity by toggling the polarity field. When the polarity is positive, 1 is high and 0 is low.
Page 323: The Analyzer Trigger Menu
Logic Analyzer Reference The Analyzer Trigger Menu The Analyzer Trigger Menu Trigger sequence levels Sequence levels are the definable stages of the total trigger specification. Individual sequence levels are assigned using either a predefined trigger macro or a user-level trigger macro. The total trigger specification can contain both kinds of macro.
Page 324: Modify Trigger Field
Logic Analyzer Reference The Analyzer Trigger Menu Modify Trigger field The Modify Trigger field allows you to modify the statements of any single sequence level as well as perform other high-level actions like global clearing of existing trigger statements, and adding or deleting sequence levels.
Page 325: Timing Trigger Macro Library
Logic Analyzer Reference The Analyzer Trigger Menu Timing trigger macro library The following list contains all the macros in the library of timing trigger macros. They are listed in the same order as they appear onscreen. User level - custom combinations, loops User Mode The User level is a user-definable level.
Page 326 Logic Analyzer Reference The Analyzer Trigger Menu 5. Find Nth occurrence of an edge This macro becomes true when it finds the designated occurrence of a designated edge. It uses one internal sequence level. 1. Find edge within a valid pattern Pattern/Edge Combinations This macro becomes true when a selected edge type is seen at the...
Page 327: State Trigger Macro Library
Logic Analyzer Reference The Analyzer Trigger Menu 3. Find width violation on a pattern/pulse This macro becomes true when the width of a pattern violates designated minimum and maximum width settings. It uses four or five internal sequence levels. Delay •...
Page 328 Logic Analyzer Reference The Analyzer Trigger Menu 3. Find event "n" consecutive times This macro becomes true when it sees a designated pattern occurring a designated number of consecutive times. It uses one internal sequence level. 4. Find event 2 immediately after event 1 This macro becomes true when the first designated pattern is seen immediately followed by a second designated pattern.
Page 329 Logic Analyzer Reference The Analyzer Trigger Menu 4. Find n-bit serial pattern This macro finds an "n" bit serial pattern on a designated channel and a designated label. It uses "n" internal sequence levels. 1. Find event 2 occurring too soon after event 1 Time Violations This macro becomes true when a designated pattern 1 is seen, followed by a designated pattern 2, and with less than a selected time period...
Page 330: Modifying The User Macro
Logic Analyzer Reference The Analyzer Trigger Menu Modifying the user macro Before you begin building a trigger specification using the user macro, it should be noted that in most cases one of the predefined trigger macros will work. If you need to accommodate a specific trigger condition, or you prefer to construct a trigger specification from scratch, use the User macro as a starting point.
Page 331 Logic Analyzer Reference The Analyzer Trigger Menu As the analyzer executes the trigger specification, it searches for a match between the resource term value and the data. When a match is found, that part of the sequence statement becomes true and the sequencing continues to the next part of the statement or the next sequence level.
Page 332 Logic Analyzer Reference The Analyzer Trigger Menu Using the Occurrence Counters Occurs field. When "Occurs" is selected, the < and > duration functions change to an occurrence counter. Use the occurrence counter to delay sequence evaluation until the resource term has occurred a designated number of times.
Page 333 Logic Analyzer Reference The Analyzer Trigger Menu If the "Else on" term is found, the secondary branch taken is to the designated sequence level. If the "Else on" term is not found, the analyzer continues to loop within the same sequence level until one of the two branches is found.
Page 334: Resource Terms
Logic Analyzer Reference The Analyzer Trigger Menu Resource terms Resource terms are user-defined variables that are assigned to sequence levels. They are placed into the sequence statement where their bit pattern or edge type is searched for within the data stream. When a match is found, a branch is initiated and the next statement or sequence level is acted upon.
Page 335 Logic Analyzer Reference The Analyzer Trigger Menu Edge terms 1 and 2 (Timing only) The two edge terms are only available in the timing analyzer. Each edge term is assigned positive-going, negative-going, or any-transition edge type. Global timers 1 and 2 In addition to the resource terms available, there are two global timers available.
Page 336 Logic Analyzer Reference The Analyzer Trigger Menu Using Preset Values Assign. Assign toggles which machine the term is assigned to. All of the available resource terms except the Edge terms can be assigned to any analyzer. However, a term can only be assigned to one analyzer at a time.
Page 337 Logic Analyzer Reference The Analyzer Trigger Menu After the assignment menu closes, you may see "$" indicators in the field display. A "$" indicates the assignment can’t be displayed in the selected base because of Don’t Cares. When you display the assignment in binary, however, you can see the actual pattern.
Page 338: Arming Control Field
Logic Analyzer Reference The Analyzer Trigger Menu Arming Control field Arming Control sets up the order of triggering for complicated measurements involving more than one machine. You can set the logic analyzer to begin running when it receives a signal from an external machine, have one analyzer start the other, or have one analyzer send a signal to another external machine.
Page 339 Logic Analyzer Reference The Analyzer Trigger Menu One possible scenario is to have several test instruments and a logic analyzer connected to a complex target system. The analyzer is armed by an external Arm In signal from another test/measurement entity. After the first analyzer triggers, it arms the second analyzer.
Page 340: Acquisition Control Field
Logic Analyzer Reference The Analyzer Trigger Menu Acquisition Control field Selecting the Acquisition Control field pops up the Acquisition Control menu. The Acquisition Control menu sets the acquisition mode, the trigger position within acquisition memory, and the sample period. Acquisition Mode field The Acquisition Mode field toggles between Manual and Automatic.
Page 341 Logic Analyzer Reference The Analyzer Trigger Menu In a timing analyzer, even when the trigger position is set to Start or End, there will always be a small portion of pre-trigger and post-trigger data stored. Most of the choices designate prestore and poststore percentages, but the Delay setting affects when the memory begins storing data relative to the trigger.
Page 342: Count Field (State Only)
Logic Analyzer Reference The Analyzer Trigger Menu Count field (State only) The Count field accesses a selection menu which indicates whether acquisition data is stamped with a Time tag or a State Count tag. Time and State tags If you have all pod pairs assigned, the state acquisition memory is reduced by half when time or state tags are turned on.
Page 343: The Listing Menu
Logic Analyzer Reference The Listing Menu The Listing Menu Markers The Markers field accesses the markers selection menu. When the Markers field is selected, a marker selection menu appears with the marker choices appropriate for the present analyzer configuration. The Off selection turns off marker operations but does not turn off operations based on the markers.
Page 344 Logic Analyzer Reference The Listing Menu Timing analyzer markers Timing analyzers always have marker choices of Pattern, Time, or Statistics. Timing analyzers do not have state markers. The pattern markers, though, can be used to count intervening patterns. Stop measurement field The stop measurement function specifies a condition that stops the analyzer measurement during a repetitive run.
Page 345: The Waveform Menu
Logic Analyzer Reference The Waveform Menu The Waveform Menu sec/Div field When acquisition control is set to automatic, the sec/Div field affects the sample period. Timing waveforms are reconstructed relative to the sample period. A shorter sample period puts more sample points on the waveform for a more accurate reconstruction but also fills memory more quickly.
Page 346: Delay Field
Logic Analyzer Reference The Waveform Menu Delay field Depending on the analyzer configuration, a positive or negative delay measured in either states (State only) or time (Timing only) can be set. The Delay field lets you scroll the data and place the display window at center screen.
Page 347 Logic Analyzer Reference The Waveform Menu Viewing state values in the bus option When all assigned waveforms in a label are overlaid with the Bus option, the value of the data is displayed in the base selected in the Listing menu to the right of each new transition in the waveform display.
Page 348: Waveform Display
Logic Analyzer Reference The Waveform Menu Waveform display At the bottom of the Waveform menu is a reference line which displays the relative location of the display window, the markers, and the trigger point with reference to the total memory. Total memory is represented by a horizontal dotted line.
Page 349: The Mixed Display Menu
Logic Analyzer Reference The Mixed Display Menu The Mixed Display Menu The Mixed Display menu combines a state listing display located at the top of the menu and a waveform display located at the bottom of the menu. The Mixed Display menu shows both state and timing data in the same display.
Page 350: Time-Correlated Displays
Logic Analyzer Reference The Mixed Display Menu Time-correlated displays Once the Time markers are set in the Waveform display area of the Mixed Display menu, time-correlated X and O Time markers will be displayed in both the listing and the waveform display areas. Markers The markers in the Mixed Display menu are not the same as the markers in the individual Listing and Waveform menus.
Page 351: The Chart Menu
Logic Analyzer Reference The Chart Menu The Chart Menu State Chart is a software post-processing feature that provides the ability to build x-y charts of label activity using state data. The Chart menu builds a graphical representation of the system under test. The Y axis always represents data values for a specified label.
Page 352: Min And Max Scaling Fields
Logic Analyzer Reference The Chart Menu Min and Max scaling fields When State is selected for the X axis, the minimum and maximum values can range from -8192 to +8192 for the 1660E-series logic analyzers, depending on the trace point location. For the 1670E-series logic analyzers, the values can range from -1 M to +1 M.
Page 353: Axis Control Field (Hp 1670E-Series Only)
Logic Analyzer Reference The Chart Menu Axis Control field (HP 1670E-series only) Axis Control pops up a menu that lets you select what will appear on the X and Y axes, what base the measurements display in, and how much of the memory appears onscreen. Chart Axis Control Menu Base.
Page 354: Rescale Field (Hp 1670E-Series Only)
Logic Analyzer Reference The Chart Menu Rescale field (HP 1670E-series only) The Rescale field allows you to zoom in on a particular area, or move back to viewing the entire chart. To use Rescale, place your markers to box in an area you want to focus on, and then select one of the “between markers”...
Page 355: The Compare Menu
Logic Analyzer Reference The Compare Menu The Compare Menu State Compare is a software postprocessing feature that compares bit- by-bit the acquired state data listing and a reference listing. State Compare is only available when at least one analyzer is configured as a State analyzer.
Page 356: Reference Listing Field
Logic Analyzer Reference The Compare Menu Reference Listing field The Reference Listing field is a toggle field that switches the listing type between the Reference image listing and the Difference listing. The Reference listing is a display of the image (or template) that acquired data is compared to during a comparison measurement.
Page 357: Copy Listing To Reference Field
Logic Analyzer Reference The Compare Menu This means that when you change the current row position in the Difference listing, the analyzer automatically updates the current row in the acquired State listing and Reference listing, and vice-versa. If the three listings are synchronized and you acquire data again, the Reference listing may have a different number of pre-trigger states depending on the trigger criteria.
Page 358: Find Error Field
Logic Analyzer Reference The Compare Menu Find Error field The Find Error field lets you easily locate any patterns that do not match in the current comparison. Occurrences of differences or errors are found in numerical ascending order from the start of the listing. The first occurrence of an error has the numerical value of one.
Page 359 Logic Analyzer Reference The Compare Menu Mask field The channel masking field is used to specify a bit, or bits in each label that you do not want compared. This causes the corresponding bits in all states to be ignored in the comparison. The Reference data image itself remains unchanged on the display.
Page 360 Logic Analyzer Reference The Compare Menu...
Page 361: System Performance Analysis (Spa) Software
System Performance Analysis (SPA) Software...
Page 362: System Performance Analysis Software
System Performance Analysis (SPA) Software System Performance Analysis Software System Performance Analysis Software The System Performance Analysis (SPA) software is included as standard software in the HP 1660E/ES/EP and 1670E-series logic analyzers. SPA provides you with a set of functions for performing statistical analysis on your target system.
Page 363 System Performance Analysis (SPA) Software System Performance Analysis Software Error messages and warnings used by SPA are the same as those used by each of the logic analyzers. Refer to page 439 for descriptions of these messages. If you need programming information, refer to the HP 1660E/ES/EP- Series Logic Analyzers Programmer’s Guide or to the HP 1670E Series Logic Analyzers Programmer’s Guide.
Page 364: What Is System Performance Analysis
System Performance Analysis (SPA) Software System Performance Analysis Software What is System Performance Analysis? The logic analyzer’s state or timing analyzer is used to make quantitative measurements on specific events in the target system. For example, they can measure a specific time interval on a microprocessor’s control lines or can find out how a particular subroutine was called.
Page 365 System Performance Analysis (SPA) Software System Performance Analysis Software Operating characteristics The following describes the operating characteristics of the System Performance Analysis software for the three SPA measurement modes. State Overview The State Overview mode displays a bar chart of a label’s state value versus the relative number of occurrences of each value in the defined range of the label.
Page 366 System Performance Analysis (SPA) Software System Performance Analysis Software State Histogram The State Histogram mode displays states that occur within user- defined ranges of a label. State Histogram is available on any label defined in the Format Specification. • The maximum number of ranges is 11. •...
Page 367: Getting Started
System Performance Analysis (SPA) Software System Performance Analysis Software Getting started This section describes how to access the System Performance Analysis (SPA) menus. Also, it describes selecting the SPA modes and setting the specifications. Accessing the menus The SPA menus are accessed through the Analyzer Configuration menu.
Page 368 System Performance Analysis (SPA) Software System Performance Analysis Software Setting up the State Format specification When a State or Timing analyzer is changed to SPA, SPA will retain the State or Timing Format specification. For complete details on changing from a State or Timing Analyzer to SPA, see "Using SPA with other features."...
Page 369: Spa Measurement Processes
System Performance Analysis (SPA) Software System Performance Analysis Software SPA measurement processes This section introduces you to the measurement processes of the System Performance Analysis (SPA) software. It tells you how to select the appropriate trace mode and labels. It also explains how SPA samples and sorts data.
Page 370 System Performance Analysis (SPA) Software System Performance Analysis Software Sampling methods and data sorting SPA provides a statistical summary of target system behavior over time. The greater the number of samples, the more accurate the statistics. Therefore, SPA should always be run in the Repetitive mode. By doing this, the analyzer will continue to sample the data and update the display until Stop is pressed or until a sampling variable is changed on the display.
Page 371 System Performance Analysis (SPA) Software System Performance Analysis Software Qualified State Histogram and Time Interval modes use all of the labels in the Format Specification to define either the qualified state or the start and stop events, respectively. While State Overview and State Histogram deal with recorded states, Time Interval deals with time.
Page 372 System Performance Analysis (SPA) Software System Performance Analysis Software Data sampling and sorting. When Run is pressed, all input channels defined in the Format Specification are sampled. Once acquired, the sampled data is sorted into the buckets of the specified label, and the State Overview display is updated.
Page 373 System Performance Analysis (SPA) Software System Performance Analysis Software State Overview example Example An example of a State Overview measurement is testing for access to a reserved area of memory. In this case, the address bus of the target system would need to be grouped under a single label, such as ADDR. By selecting the ADDR label in State Overview mode, and by defining the full range of the label (Low value = 0000, High value = FFFF with a 16-bit ADDR label), activity over the entire address range can be...
Page 374 System Performance Analysis (SPA) Software System Performance Analysis Software State Histogram mode State Histogram mode displays relative activity of ranges of a specified label. The ranges can also be compared to activity on the rest of the label not defined in the ranges. Data qualification is possible with State Histogram, so data can be filtered during acquisition.
Page 375 System Performance Analysis (SPA) Software System Performance Analysis Software State Overview mode does not display data that falls out of the range of its Low and High values. State Histogram, on the other hand, has an "Other States included/excluded" feature that will present a histogram of any activity that does not fall into the defined ranges (see "Other States included/ excluded,"...
Page 376 System Performance Analysis (SPA) Software System Performance Analysis Software Number of samples per range. Displayed next to each bar is a value representing the number of samples for that range. The ratio of these values to total samples determines the relative size of the histograms. These values are updated as the repeated acquisitions are sorted and displayed.
Page 377 System Performance Analysis (SPA) Software System Performance Analysis Software State Histogram example Example A computer system has several I/O devices, such as a data terminal, disk drive, tape drive, and printer. Each device has its own service routines stored in memory. The problem is that one or more of the devices is tying up the CPU.
Page 378 System Performance Analysis (SPA) Software System Performance Analysis Software Time Interval mode Time Interval mode shows distribution of the execution time of a single event. The event is defined by specifying Start and End conditions as patterns across all labels defined in the Format Specification. Data sampling and sorting.
Page 379 System Performance Analysis (SPA) Software System Performance Analysis Software Start and end conditions need not be adjacent in the data stream. For example, when the state analyzer sees the specified start condition, it starts the timer. If the start condition occurs again before the end condition occurs, the timer will not be reset.
Page 380 System Performance Analysis (SPA) Software System Performance Analysis Software Min, Max, and Avg Time Statistics. The Time Interval mode display shows three statistics: Maximum (Max) time, Minimum (Min) time, and Average (Avg) time. These values are displayed whether or not they fall into any of the time interval ranges. Therefore, they are helpful in determining if the appropriate time intervals have been chosen.
Page 381 System Performance Analysis (SPA) Software System Performance Analysis Software Time Interval example Example A team of applications programmers is writing a math package for a spreadsheet. They need to develop standards for the various math functions. Using time interval mode, they can test the execution time of each of the math functions.
Page 382 System Performance Analysis (SPA) Software System Performance Analysis Software Measurement example using all three trace modes Example In a 32-bit microprocessor system, you want to determine how efficiently the CPU is being utilized. Critical questions might be: are any processes consuming excessive processing time, are any processes getting stuck in wait loops, and is the system handling service calls and interrupts efficiently? You connect the HP logic analyzer to the address bus of your system.
Page 383 System Performance Analysis (SPA) Software System Performance Analysis Software Next, you go to the State Histogram menu and enter the names and boundaries of the five routines in the state histogram ranges. State Histogram then displays the relative activity of the five routines. After several acquisitions, it is apparent that the interrupt routine is being accessed more often than expected.
Page 384 System Performance Analysis (SPA) Software System Performance Analysis Software Running the acquisition again, you discover that the interrupt usually takes the expected 8 microseconds, but occasionally it takes as long as 8milliseconds. After experimenting with the target system while monitoring the interrupt with Time Interval mode, a faulty key on the keyboard is discovered.
Page 385: Using State Overview, State Histogram, And Time Interval
System Performance Analysis (SPA) Software System Performance Analysis Software Using State Overview, State Histogram, and Time Interval This section explains how to select the display fields, set up the logic analyzer and use the State Overview, State Histogram and Time Interval modes of SPA.
Page 386 System Performance Analysis (SPA) Software System Performance Analysis Software Label Low value X marker O Marker High Value Max Count Bucket Display Area X Mark count O Mark count Total count SPA State Overview Menu with Fields Called Out Specifying Low and High values The range of the X axis is determined by the Low value and High value fields.
Page 387 System Performance Analysis (SPA) Software System Performance Analysis Software The default high and low values represent the full range of the label you chose. Before changing these values, you may want to run the acquisition and acquire some data to view activity over the entire range of the label.
Page 388 System Performance Analysis (SPA) Software System Performance Analysis Software Zooming in on an area of interest. When viewing the State Overview display, you may see areas of high activity and areas of little or no activity. To zoom in on one of these areas for more resolution, put the X and O markers on the boundaries of the area, then adjust the low and high values to match the X and O marker positions.
Page 389 System Performance Analysis (SPA) Software System Performance Analysis Software Using symbols for ranges. In the Format menu, you can define symbols for any available label. The symbols can be defined as Pattern Symbols or Range Symbols. For complete information on defining and using symbols, see "Symbols field"...
Page 390 System Performance Analysis (SPA) Software System Performance Analysis Software Interpreting the histogram display. Press the blue shift key and Run to start the State Histogram acquisition. The relative activity over the ranges you defined is displayed as histograms (see the figure on the previous page).
Page 391 System Performance Analysis (SPA) Software System Performance Analysis Software Using Time Interval mode Use Time Interval mode to determine the distribution of time between two specific events. The state analyzer uses the time tag feature to time the event; thus, in Time Interval mode, the minimum state clock period is 10 ns.
Page 392 System Performance Analysis (SPA) Software System Performance Analysis Software SPA Time Interval Menu For measurement purposes, the analyzer measures the time between the first occurrence of the Start condition and the first occurrence of the Stop condition. Defining the Time Interval ranges. Before changing the ranges from their default values, you may want to press Run and acquire some data.
Page 393 System Performance Analysis (SPA) Software System Performance Analysis Software Using Auto-range. To quickly set up all 8 time interval ranges, select the Auto-range field. Enter the minimum time and maximum time for all 8 ranges combined. Then, when you select Log Scale or Linear Scale, all 8 ranges will be scaled accordingly between the Minimum and Maximum times.
Page 394 System Performance Analysis (SPA) Software System Performance Analysis Software The analyzer continues to search for Start/End event pairs until you press Stop or change a display variable. The distribution of the events’ time duration is displayed as histograms. The Max time, Min time, and Avg time statistics give you useful statistics for the event you defined no matter what ranges you’ve set SPA Time Interval Menu The Total samples field shows the number of Start/End event pairs...
Page 395: Using Spa With Other Features
System Performance Analysis (SPA) Software System Performance Analysis Software Using SPA with other features Programming with SPA SPA is programmable. Refer to the HP 1660E/ES/EP or HP 1670E Series Logic Analyzers Programmer’s Guide for SPA commands. The Programmer’s Guide is available as an option with the logic analyzer. Contact your HP Sales Office for more information.
Page 396 System Performance Analysis (SPA) Software System Performance Analysis Software Using SPA in Group Runs The HP 1660/70-series logic analyzers allow you to set up group runs using the Arming Control field of the other machine’s Trigger menu. By its statistical nature, SPA runs best as a repetitive measurement system.
Page 397 Logic Analyzer Concepts...
Page 398: Logic Analyzer Concepts
Logic Analyzer Concepts Logic Analyzer Concepts Logic Analyzer Concepts Understanding how the analyzer does its job will help you use it more effectively and minimize measurement problems. This chapter explains the structure of the file system, the details of transitional timing mode, the general operation of the trigger sequence, and the details of the hardware.
Page 399: The File System
Logic Analyzer Concepts The File System The File System The HP 1660E/ES/EP and 1670E-series logic analyzers have a complex internal file system. Many of the file attributes are only accessible over a LAN connection. From the logic analyzer’s front panel, the only parts of the file system you can examine are the hard disk drive and the flexible disk drive.
Page 400: Directories
Logic Analyzer Concepts The File System Directories Hard disk drive When you receive the logic analyzer, the hard disk drive is already DOS-formatted. The factory also creates a directory on the hard disk drive named "/SYSTEM". The /SYSTEM directory is intended to store system software such as backup copies of the operating system files and the performance verification files.
Page 401: File Types
Logic Analyzer Concepts The File System File types Standard file types The file type is shown in a small display box centered on the line above the file listings. autoload_file. indicates the file, almost always named AUTOLOAD, is an autoload file. The file description indicates if the autoload file is enabled or disabled, and the file it autoloads.
Page 402 Logic Analyzer Concepts The File System 166xsc_config. indicates the file is an oscilloscope configuration. These files are created by executing "Store Scope" or "Store All" in the System Disk menu. 16522_cnfg. indicates that the file is a pattern generator configuration. These files are created by executing "Store Patt Gen" in the System Disk menu.
Page 403: Transitional Mode Theory (1660E/Es/Ep-Series Only)
Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) Transitional Mode Theory (1660E/ES/EP-series only) In Transitional acquisition mode, the timing analyzer samples data at regular intervals, but only stores data when there is a transition between logic levels on currently assigned bits of a pod pair. Each time a level transition occurs on any of the bits, all bits of the pod pair are stored.
Page 404 Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) Minimum transitions stored Sometimes transitions occur at a relatively slow rate, slow enough to ensure at least one sample with no transitions between the samples with transitions. This is illustrated in the figure on the next page with time tags 2, 5, 7, and 14.
Page 405: 250-Mhz Transitional Mode
Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) 250-MHz Transitional mode Transitional timing running at 250 MHz is the same as the 125-MHz mode, except that two single-pod data samples (17 bits x 2 = 34 bits) are stored instead of one full-pod-pair data sample (34 bits). This is because in half-channel mode, data is multiplexed into the pipeline in two 17-bit samples.
Page 406 Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) Minimum transitions stored The figure above shows what data is stored from a data stream with transitions that occur at a slow rate (more than 24 ns apart). As shown, transitions are stored in two different ways, depending strictly on chance.
Page 407 Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) Maximum transitions stored The following example shows the case where the transitions are occurring at a 4-ns rate: Maximum Transitions Stored In this case, transitions are being detected with each sample so all samples are stored.
Page 408: Other Transitional Timing Considerations
Logic Analyzer Concepts Transitional Mode Theory (1660E/ES/EP-series only) Other transitional timing considerations Pod pairs are independent. In single run mode, each pod pair runs independently. This means when one pod pair fills its trace buffer it will not shut the others down. If you have a pod pair with enabled data lines and no transitions on its lines, you get a message "Storing transitions after trigger for pods nn/nn."...
Page 409: The Trigger Sequence
Logic Analyzer Concepts The Trigger Sequence The Trigger Sequence HP 1660E/ES/EP and HP 1670E-series logic analyzers have triggering and data storage features that allow you to capture only the system activity of interest. Understanding how these features work will help you set up analyzer trigger specifications that satisfy your measurement needs.
Page 410: Trigger Sequence Specification
Logic Analyzer Concepts The Trigger Sequence Trigger sequence specification See the following figure, which shows a sequence specification with four levels. To define the trigger sequence, you specify sequence- advance, sequence-else, storage, and trigger-on specifications. Each level except the last has two branch conditions, the sequence- advance and sequence-else specification.
Page 411 Logic Analyzer Concepts The Trigger Sequence Sequence-advance specification The sequence-advance branch, sometimes called the "if" branch or primary branch, always branches to the next level. You can specify the following kinds of sequence-advance specifications: Find (or Then find) "<TERM>" <OCCURS> time(S) Find (or Then find) "<TERM>"...
Page 412 Logic Analyzer Concepts The Trigger Sequence Trigger on specification. If there are branch and storage specifications for each sequence level, what does the trigger term mean? The trigger term is a special sequence-advance specification in that, when found, it locks the contents of analyzer acquisition memory. The trigger can be positioned at the beginning, middle, or end of acquisition memory.
Page 413: Analyzer Resources
Logic Analyzer Concepts The Trigger Sequence Analyzer resources The sequence-advance, sequence-else, storage, and trigger-on specifications are set by a combination of a maximum of 10 pattern terms, 2 range terms, 2 timers, and 2 edge terms (for the timing analyzer only). A resource can only be assigned to one analyzer at a time.
Page 414 Logic Analyzer Concepts The Trigger Sequence You can combine the pattern terms and range terms with logical operators to form complex pattern expressions in the sequence- advance, sequence-else, and TRIGGER on specifications. For example, Find "(<TERM1> • <TERM2>) + (<TERM3> • <TERM4>)" Where <TERM>...
Page 415 Logic Analyzer Concepts The Trigger Sequence Resource Combination Hierarchy Group Pair Resource Operation Resource Pair Links Group Link Group 1 Pair 1 Off, On, Negate Combine Combine Off, On, Negate resources pairs within Pair 2 Off, On, Negate within pairs groups or Off, In Range, Out of Range Range 1...
Page 416 Logic Analyzer Concepts The Trigger Sequence For example, the following combinations are valid combinations for the analyzer: (a+b) • (In_Range2 + Timer2 > 400 ns) (c • Out_Range1) + (f xor g) The following combinations are not valid, because resources cross pair boundaries: a xor c (d + Timer1 <...
Page 417 Logic Analyzer Concepts The Trigger Sequence The first example shows that a and c cannot be combined at the first level. The following figure shows the possible combinations of the a, b, c and Range1 terms: Combining a, b, c, and Range1 Terms The following combination is not valid because pairs cross group boundaries: ((a+b) + (h s In_Range2)) s (j xor Timer2 >...
Page 418: Timing Analyzer
Logic Analyzer Concepts The Trigger Sequence Timing analyzer When you configure a timing analyzer, the trigger sequence follows the general outlines given previously. The trigger sequence of the timing analyzer differs from the state analyzer in the following ways: • There are 10 levels available to build a trigger. •...
Page 419: Configuration Translation Between Hp Logic Analyzers
Logic Analyzer Concepts Configuration Translation Between HP Logic Analyzers Configuration Translation Between HP Logic Analyzers Analyzer configuration files cannot be transferred directly from one type of analyzer to another because each analyzer has internal architectural differences, reflected in the number of pods, clock configurations, trigger sequence features, analyzer resources, and so on.
Page 420 Logic Analyzer Concepts Configuration Translation Between HP Logic Analyzers The configuration translator needs to account for many aspects of the analyzer architecture. Some of the considerations are as follows: • When a range term is split across multiple pods, the term must span adjacent odd/even pairs, starting with 1.
Page 421: The Analyzer Hardware
Logic Analyzer Concepts The Analyzer Hardware The Analyzer Hardware This section describes the theory of operation for the logic analyzer and describes the self-tests. The information in this section is to help you understand how the logic analyzer operates and what the self-tests are testing.
Page 422: Hp 1660E/Es/Ep-Series Analyzer Theory
Logic Analyzer Concepts The Analyzer Hardware HP 1660E/ES/EP-series analyzer theory HP 1660EP logic analyzer board...
Page 423 Logic Analyzer Concepts The Analyzer Hardware CPU board The microprocessor is a Motorola 68EC020 running at 25 MHz. The microprocessor controls all of the functions of the logic analyzer including processing and storing data, displaying data, and configuring the acquisition ICs to obtain and store data. System memory The system memory is made up of both read-only memory (ROM) and random access memory (RAM).
Page 424 Logic Analyzer Concepts The Analyzer Hardware HP-IB interface The instrument interfaces to HP-IB as defined by IEEE Standard 488.2. The interface consists of an HP-IB controller and two octal drivers/ receivers. The microprocessor routes HP-IB data to the controller. The controller then buffers the 8-bit HP-IB data bits and generates the bus handshaking signals.
Page 425 Logic Analyzer Concepts The Analyzer Hardware LAN Interface The LAN Interface is primarily a single LAN integrated circuit with supporting components. Isolation circuitry for the LAN port is included on the I/O board. The LAN interface conforms to IEEE 802.3...
Page 426: Logic Acquisition Board Theory
Logic Analyzer Concepts The Analyzer Hardware Logic acquisition board theory Logic acquisition board...
Page 427 Logic Analyzer Concepts The Analyzer Hardware Probing The probing circuit includes the probe cable and terminations. The probe cable consists of two 17-channel pods which are connected to the circuit board using a high-density connector. Sixteen single-ended data channels and one single-ended clock/data channel per pod are passed to the circuit board.
Page 428 Logic Analyzer Concepts The Analyzer Hardware Each of the comparator ICs has a serial test input port used for testing purposes. A test bit pattern is sent from the Test and Clock Synchronization Circuit to the comparator. The comparators then propagate the test signal on each of the nine channels of the comparator.
Page 429 Logic Analyzer Concepts The Analyzer Hardware Threshold A precision octal DAC and precision op amp drivers make up the threshold circuit. Each of the eight channels of the DAC is individually programmable which allows you to set the thresholds of the individual pods.
Page 430: Oscilloscope Board Theory
Logic Analyzer Concepts The Analyzer Hardware Oscilloscope board theory Oscilloscope board...
Page 431 Logic Analyzer Concepts The Analyzer Hardware Attenuator/Preamp theory of operation The channel signals are conditioned by the attenuator/preamps, thick film hybrids containing passive attenuators, impedance converters, and a programmable amplifier. The channel sensitivity defaults to the standard 1-2-4 sequence (other sensitivities can be set also). However, the firmware uses passive attenuation of 1, 5, 25, and 125, with the programmable preamp, to cover the entire sensitivity range.
Page 432 Logic Analyzer Concepts The Analyzer Hardware ADC Hybrid. The ACD Hybrid provides all of the sampling, digitizing, and high-speed waveform storage. The ADC includes a phase-locked loop frequency converter that, for sample rates from 250 MHz to 2 GHz, multiplies the input clock from the time base. FISO memory.
Page 433 Logic Analyzer Concepts The Analyzer Hardware The 100 MHz reference oscillator provides the base sample frequency. The time base hybrid has programmable dividers to provide the rest of the sample frequencies appropriate for the time range selected. The time base uses the time-stretched output of the fine interpolator to time-reference the sampling to the trigger point.
Page 434 Logic Analyzer Concepts The Analyzer Hardware Digital Interface. The Digital Interface provides control and interface between the system control and digital functions in the acquisition circuitry. Analog Interface The Analog Interface provides control of analog functions in the acquisition circuitry. It is primarily a 16-channel DAC with an accurate reference and filters on the outputs.
Page 435: Pattern Generator Board Theory
Logic Analyzer Concepts The Analyzer Hardware Pattern Generator board theory Pattern Generator Board Loop Register The loop register holds the programmable vector flow information. When the module reaches the end of the vector listing, the loop register is queried for the RAM address location of the next user- programmed vector.
Page 436 Logic Analyzer Concepts The Analyzer Hardware Consisting of five 256Kx16 VRAM ICs and RAM addressing circuitry, the RAM stores the desired patterns that appear at the module output. The RAM addressing circuitry is merely a counter which addresses the pattern locations in RAM. When the end of the vector listing is reached, the addressing circuitry is loaded from the loop register with the address of the first vector of the listing to provide an uninterrupted vector loop.
Page 437 Logic Analyzer Concepts The Analyzer Hardware The output of the clock select multiplexer is also distributed to an external clock out circuit. The clock signal is routed to a bank of external clock delays, and then to an external clock delay select multiplexer.
Page 438: Self-Tests Description
Logic Analyzer Concepts The Analyzer Hardware Self-tests description The self-tests identify the correct operation of major functional areas in the logic analyzer. The self-tests are not intended for component-level diagnostics. Three types of tests are performed on the HP 1660/70-series logic analyzers: the power-up self-tests, the functional performance verification self-tests, and the parametric performance verification tests.
Page 439 Troubleshooting the Logic Analyzer...
Page 440: Troubleshooting The Logic Analyzer
Troubleshooting the Logic Analyzer Troubleshooting the Logic Analyzer Troubleshooting the Logic Analyzer Occasionally, a measurement may not give the expected results. If you encounter difficulties while making measurements, use this chapter to guide you through some possible solutions. Each heading lists a problem you may encounter, along with some possible solutions.
Page 441: Analyzer Problems
Troubleshooting the Logic Analyzer Analyzer Problems Analyzer Problems This section lists general problems that you might encounter while using the analyzer. Intermittent data errors This problem is usually caused by poor connections, incorrect signal levels, or marginal timing. ❏ With the logic analyzer and all connected equipment turned off, remove and reseat all cables and probes;...
Page 442: Unwanted Triggers
Troubleshooting the Logic Analyzer Analyzer Problems Unwanted triggers Unwanted triggers can be caused by instructions that were fetched but not executed. ❏ Add the prefetch queue or pipeline depth to the trigger address. The depth of the prefetch queue depends on the processor that you are analyzing.
Page 443: Capacitive Loading
Troubleshooting the Logic Analyzer Analyzer Problems Capacitive loading Excessive capacitive loading can degrade signals, resulting in incorrect capture by the analysis probe, or system lockup in the microprocessor. All analysis probes add additional capacitive loading, as can custom probe fixtures you design for your application. To reduce loading, remove as many pin protectors, extenders, and adapters as possible.
Page 444: Analysis Probe Problems
Troubleshooting the Logic Analyzer Analysis Probe Problems Analysis Probe Problems This section lists problems that you might encounter when using an analysis probe. If the solutions suggested here do not correct the problem, you may have a defective analysis probe. Refer to the User’s Guide for your analysis probe for test procedures.
Page 445: Slow Clock
Troubleshooting the Logic Analyzer Analysis Probe Problems Slow clock If you have the analysis probe hooked up and running and observe a slow clock or no activity from the interface board, the +5 V supply coming from the analyzer may not be getting to the interface board. ❏...
Page 446: Erratic Trace Measurements
Troubleshooting the Logic Analyzer Analysis Probe Problems Erratic trace measurements There are several general problems that can cause erratic variations in trace lists and inverse assembly failures. ❏ Ensure that the analysis probe configuration switches are correctly set for the measurement you are trying to make. Some analysis probes include configuration switches for various features (for example, to allow dequeueing of the trace list).
Page 447: Inverse Assembler Problems
Troubleshooting the Logic Analyzer Inverse Assembler Problems Inverse Assembler Problems This section lists problems that you might encounter while using the inverse assembler. When you obtain incorrect inverse assembly results, it may be unclear whether the problem is in the analysis probe or in your target system. If you follow the suggestions in this section to ensure that you are using the analysis probe and inverse assembler correctly, you can proceed with confidence in debugging your target system.
Page 448 Troubleshooting the Logic Analyzer Inverse Assembler Problems ❏ Ensure that each analyzer pod is connected to the correct analysis probe cable. There is not always a one-to-one correspondence between analyzer pod numbers and analysis probe cable numbers. Analysis probes must supply address (ADDR), data (DATA), and status (STAT) information to the analyzer in a predefined order, so the cable connections for each analysis probe are often altered to support that need.
Page 449: Inverse Assembler Will Not Load Or Run
Troubleshooting the Logic Analyzer Inverse Assembler Problems Inverse assembler will not load or run You need to ensure that you have the correct system software loaded on your analyzer. ❏ Ensure that the inverse assembler is on the same disk as the configuration files you are loading.
Page 450: Error Messages
Troubleshooting the Logic Analyzer Error Messages Error Messages This section lists some of the messages that the analyzer displays when it encounters a problem. ". . . Inverse Assembler Not Found" This error occurs if you rename or delete the inverse assembler file that is attached to the configuration file.
Page 451: Selected File Is Incompatible
Troubleshooting the Logic Analyzer Error Messages "Selected File is Incompatible" This occurs when you try to load a configuration file for the wrong module. Ensure that you are loading a translatable configuration file for your logic analyzer. "Slow or Missing Clock" ❏...
Page 452: Must Have At Least 1 Edge Specified
Troubleshooting the Logic Analyzer Error Messages "Must have at least 1 edge specified" You must assign at least one clock edge to one of the available clocks in the clocking arrangement. The analyzer will not let you close the clock assignment pop-up until an edge is specified.
Page 453: Timer Is Off In Sequence Level N Where It Is Used
Troubleshooting the Logic Analyzer Error Messages "Timer is off in sequence level n where it is used" If you use timers as part of your trigger sequence, you must remember to turn them on using Timer Control in the Sequence Level pop-up menu.
Page 454: Measurement Initialization Error
Troubleshooting the Logic Analyzer Error Messages "Measurement Initialization Error" The logic analyzer failed its internal hardware calibration. ❏ Run the Performance Verification tests. See Also The HP 1660E/ES/EP or HP 16700E-Series Logic Analyzers Service Guide for information on running the Performance Verification test. "Warning: Run HALTED due to variable change"...
Page 455: Specifications
Specifications...
Page 456: General Information
Specifications General Information General Information This chapter lists the accessories, specifications and characteristics for the HP 1660E/ES/EP and HP 1670E-series logic analyzers. Accessories The following accessories are supplied with the HP logic analyzer. You will only be supplied the accessories needed for the model you have. The part numbers are current as of this edition of the User’s Guide, but future upgrades may change the part numbers.
Page 457 Specifications General Information Note 1 Quantities: 8 - 1660E/ES/EP and 1670E 6 - 1661E/ES/EP and 1671E 4 - 1662E/ES/EP and 1672E 2 - 1663E/ES/EP Note 2 Quantities 4 - 1660E/ES/EP and 1670E 3 - 1661E/ES/EP and 1671E 2 - 1662E/ES/EP and 1672E 1 - 1663E/ES/EP...
Page 458: Specifications (Logic Analyzer)
Specifications General Information Specifications (logic analyzer) The specifications are the performance standards against which the product is tested. Refer to the HP 1660E/ES/EP or HP 1670E Logic Analyzers Service Guide (available from your HP Sales Office) for testing procedures. Maximum state speed 100 MHz Minimum state clock pulse width 3.5 ns...
Page 459: Specifications (Oscilloscope)
Specifications General Information Specifications (oscilloscope) The specifications are the performance standards against which the HP 1660ES-series logic analyzers oscilloscope is tested. Bandwidth*: dc to 500 MHz (realtime, dc coupled) +/-[(0.005% of ∆ t) + Time Interval Measurement Accuracy*, **: (2 x 10-6 x delay setting) + 100 ps] DC Offset Accuracy*: +/-(1.0% of channel offset + 2.0% of full scale)
Page 460: Characteristics (Logic Analyzer)
Specifications General Information Characteristics (logic analyzer) These characteristics are not specifications, but are included as additional information. Full Channel Half Channel Maximum state clock rate (1660’s) 100 MHz 100 MHz Maximum state clock rate (1670’s) 100 MHz not applicable Maximum conventional timing rate (1660’s) 250 MHz 500 MHz...
Page 461: Characteristics (Oscilloscope)
Specifications General Information Characteristics (oscilloscope) The characteristics are not specifications, but are included as additional information. Maximum sample rate 2 Gigasample per second Number of channels Rise Time 700 ps 8-bit real time Vertical resolution 8 bits over 4 vertical divisions (±0.4%) Waveform record length 32,768 points Vertical (dc) gain accuracy**...
Page 462 Specifications General Information Logic levels TTL, 3-state, TTL/3.3v, 3-state TTL/CMOS, ECL terminated, ECL Unterminated, and differential ECL (without POD) Data inputs 3-bit pattern - level sensing (clock pod) Clock outputs Synchronized to output data Clock input DC to 200 MHz Internal clock period Programmable from 5 ns to 250 us in a 1, 2, 2.5, 4, 5, 8 sequence...
Page 463: Supplemental Characteristics (Logic Analyzer)
Specifications General Information Supplemental characteristics (logic analyzer) Probes 100 k Ω , ±2% Input resistance Input capacitance ~ 8 pF Minimum voltage swing 500 mV, peak-to-peak Threshold range ±6.0 V, adjustable in 50-mV increments, CAT I State analysis State/Clock qualifiers 1660/61 - 6;...
Page 464 Specifications General Information Timing analysis Sample period accuracy 0.01 % of sample period Channel-to-channel skew 2 ns, typical Time interval accuracy ± [sample period + channel-to-channel skew +(0.01%)(time reading)] Triggering Sequencer speed 125 MHz, maximum State sequence levels Timing sequence levels Maximum occurrence counter value 1,048,575...
Page 465 Specifications General Information Measurement and display functions Displayed waveforms. 24 lines maximum, with scrolling across 96 waveforms. Measurement functions Run/Stop functions. Run starts acquisition of data in specified trace mode. Stop. In single trace mode or the first run of a repetitive acquisition, Stop halts acquisition and displays the current acquisition data.
Page 466 Specifications General Information Data entry/display Labels. Channels may be grouped together and given a 6-character name. Up to 126 labels in each analyzer may be assigned with up to 32 channels per label. Display modes. State Listing, State Waveforms, Chart, Compare Listing, Compare Difference Listing, Timing Waveforms, and Timing Listings.
Page 467 Specifications General Information Marker functions Time interval. The X and O markers measure the time interval between a point on a timing waveform and the trigger, two points on the same timing waveform, two points on different waveforms, or two states (time tagging on).
Page 468: Supplemental Characteristics (Oscilloscope)
Specifications General Information Supplemental characteristics (oscilloscope) Vertical (at BNC) Vertical sensitivity range 4 mV/div to 10 V/div in 1-2-4 increments (1:1 Probe) DC offset range Vertical sensitivity Available offset 4mV - 100mV/div ±2V 100mV - 400mV/div ±10V 400mV - 2.5V/div ±50V 2.5V - 10V/div ±250V...
Page 469 Specifications General Information Triggering: Trigger Level Range: Within display window (vertical offset +/- 2 divisions) Trigger Modes: Immediate: Triggers immediately after arming condition is met. Edge: Triggers on rising or falling edge from channel 1 or channel 2. Pattern: Triggers on entering or exiting a specified pattern across two channels.
Page 470: Operating Environment
Specifications General Information Operating environment Temperature Instrument, 0 °C to 55 °C (+32 °F to 131 °F). Probe lead sets and cables, 0 °C to 65 °C (+32 °F to 149 °F). Flexible disk media, 10 °C to 40 °C (+50 °F to 104 °F) Humidity Instrument, probe lead sets, and cables, up to...
Page 471 Operator’s Service...
Page 472: Operator's Service
Operator’s Service Operator’s Service Operator’s Service This chapter provides information on how to prepare the logic analyzer for use, and contains self-tests and flow charts used for troubleshooting the logic analyzer. The HP 1660E/ES/EP and 1670E-Series Logic Analyzers Service Guides contain detailed service procedures. Service guides can be ordered through your HP Sales Office;...
Page 473: Preparing For Use
Operator’s Service Preparing For Use Preparing For Use This section gives you instructions for preparing the logic analyzer for use. Power requirements The logic analyzer requires a power source of either 115 VAC or 230 VAC, -22 % to +10%, single phase, 48 to 66 Hz, 200 Watts maximum power.
Page 474: To Inspect The Logic Analyzer
Operator’s Service Preparing For Use To inspect the logic analyzer 1 Inspect the shipping container for damage. If the shipping container or cushioning material is damaged, keep them until you have checked the contents of the shipment and checked the instrument mechanically and electrically.
Page 475: To Set The Line Voltage
Operator’s Service Preparing For Use To set the line voltage When shipped from HP, the line voltage selector is set and an appropriate fuse is installed for operating the instrument in the country of destination. CAUTION: Electrostatic discharge can damage electronic components. Use grounded wrist straps and mats when performing any service to the logic analyzer.
Page 476: To Degauss The Display
Operator’s Service Preparing For Use To degauss the display If the logic analyzer has been subjected to strong magnetic fields, the CRT might become magnetized and display data might become distorted. To correct this condition, degauss the CRT with a conventional external television type degaussing coil.
Page 477: Troubleshooting
Operator’s Service Troubleshooting Troubleshooting This section helps you troubleshoot the logic analyzer to find the problem. The troubleshooting consists of flowcharts, self-test instructions, and tests. If you suspect a problem, start at the top of the first flowchart. During the troubleshooting instructions, the flowcharts will direct you to perform other tests.
Page 478: To Use The Flowcharts
Operator’s Service Troubleshooting To use the flowcharts Flowcharts are the primary tool used to isolate problems in the logic analyzer. The flowcharts refer to other tests to help isolate the trouble. The circled letters on the charts indicate connections with the other flowcharts.
Page 479 Operator’s Service Troubleshooting Troubleshooting Flowchart 2...
Page 480: To Check The Power-Up Tests
Operator’s Service Troubleshooting To check the power-up tests The logic analyzer automatically performs power-up tests when you apply power to the instrument. The revision number of the operating system shows in the upper-right corner of the screen during these power-up tests. As each test completes, either "passed" or "failed" prints on the screen in front of the name of each test.
Page 481: To Run The Self-Tests
Operator’s Service Troubleshooting To run the self-tests Self-tests identify the correct operation of major functional areas of the analyzer. You can run all self-tests without accessing the interior of the instrument. If a self-test fails, the troubleshooting flowcharts instruct you to change a part of the analyzer. These procedures assume the files on the PV disk have been copied to the /SYSTEM subdirectory on the hard disk drive.
Page 482 Operator’s Service Troubleshooting 4 Press the System key, then select the field next to Sys PV. Select System Test to access the system tests. 5 Select ROM Test. The ROM Test screen is displayed. You can run all tests at one time by running All System Tests. To see more details about each test, you can run each test individually.
Page 483 Operator’s Service Troubleshooting 6 Select Run, then select Single. To run a test continuously, select Repetitive. Select Stop to halt a repetitive test. For a Single run, the test runs one time, and the screen shows the results.
Page 484 Operator’s Service Troubleshooting 7 To exit the ROM Test, select Done. Note that the status changes to PASSED or FAILED. 8 Install a formatted disk that is not write-protected into the flexible disk drive. Connect an RS-232-C loopback connector onto the RS-232-C port. Run the remaining System Tests in the same manner.
Page 485 Operator’s Service Troubleshooting 10 Select the Display Test. A white grid pattern is displayed. These display screens can be used to adjust the display. a Select Continue and the screen changes to full bright. b Select Continue and the screen changes to half bright. c Select Continue and the test screen shows the Display Test status changed to TESTED.
Page 486 Operator’s Service Troubleshooting 12 In the Chip 2 Tests menu, select Run, then select Single. The test runs one time, then the screen shows the results. When the test is finished, select Done. Then, perform the other Chip Tests. To run a test continuously, select Repetitive. Select Stop to halt a Run Repetitive.
Page 487 Operator’s Service Troubleshooting 14 Select Data Input Inspection. All lines should show activity. Select Done to exit the Data Input Inspection. 15 If you do not have an HP 1660ES-series logic analyzer, exit the tests by pressing the System key. Select the field to the right of the Sys PV field.
Page 488 Operator’s Service Troubleshooting 17 Select one of the Scope PV tests. You can run all of the tests at one time by selecting All Tests, or you can run each test individually. For this example, select Data Memory Test. 18 In the Data Memory Test menu, select Run, then select Single. The test runs one time, then the screen shows the results.
Page 489 Operator’s Service Troubleshooting 19 To exit the tests, press the System key. Select the field to the right of the Sys PV field. 20 Select the Exit Test System. If you are performing the self-tests as part of the troubleshooting flowchart, return to the flowchart.
Page 490: To Test The Auxiliary Power
Operator’s Service Troubleshooting To test the auxiliary power The +5 V auxiliary power is protected by a current overload protection device. If the current on pins 1 and 39 exceed 0.33 amps, the circuit will open. When the short is removed, the circuit will reset in approximately 1 minute.
Page 491 Section 2...
Page 493 Introducing the LAN Interface...
Page 494: Introducing The Lan Interface
Introducing the LAN Interface Introducing the LAN Interface Introducing the LAN Interface The HP Logic Analyzer LAN interface lets you connect your logic analyzer to an Ethernet network that uses TCP/IP. With the LAN Interface, you can: • Set up and run measurements using the logic analyzer's XWindow interface.
Page 495 Introducing the LAN Interface Introducing the LAN Interface Supported Protocols. • Transmission Control Protocol/Internet Protocol (TCP/IP) • Network File System (NFS) • File Transfer Protocol (ftp) • X Window System Version 11, release 5 (X11R5) • Simple Network Management Protocol (SNMP)
Page 496: Lan Section Overview
Introducing the LAN Interface Introducing the LAN Interface LAN section overview The chapters in the LAN section of this User’s Guide shows you how to connect, use, and troubleshoot your HP logic analyzer via a Local Area Network (LAN) connection. The following is a brief description of each chapter.
Page 497 Connecting and Configuring the LAN...
Page 498: Connecting And Configuring The Lan
Connecting and Configuring the LAN Connecting and Configuring the LAN Connecting and Configuring the LAN In order to use your logic analyzer’s network capabilities, you need to connect it to your network and configure the logic analyzer. The following chart shows an overview of the process. Connect the RJ-45 or BNC Connect connector from your network, then...
Page 499: To Connect To Your Network
Connecting and Configuring the LAN Connecting and Configuring the LAN To connect to your network 1 Turn off the logic analyzer. 2 Connect the analyzer to your network using an RJ-45 or BNC connector. Ethertwist and thinlan are the two most common types of LAN network connection.
Page 500: To Configure The Network Addresses
Connecting and Configuring the LAN Connecting and Configuring the LAN To configure the network addresses You can configure the logic analyzer to work with your network from the front panel. Information entered in the configuration menus will be stored in nonvolatile memory. 1 Go to the System External I/O menu and select LAN Settings.
Page 501 Connecting and Configuring the LAN Connecting and Configuring the LAN 2 Set up the LAN Settings menu. LAN Settings menu Lan Port . The LAN Port toggles between LAN TP and LAN BNC. Set it to whichever type you are using for the connection. Analyzer IP Address.
Page 502 Connecting and Configuring the LAN Connecting and Configuring the LAN File Timeout. This is not the same as the network timeout, which is set on the computer. The logic analyzer file timeout is how long the analyzer keeps a file in the active portion of memory. For slow network connections, a large file timeout decreases the total time for a file transfer.
Page 503: To Verify Connectivity With The Ping Utility
Connecting and Configuring the LAN Connecting and Configuring the LAN To verify connectivity with the ping utility Use the ping utility to verify that the logic analyzer is on your network. Refer to your network documentation for the exact syntax. •...
Page 504: To Mount The Logic Analyzer
Connecting and Configuring the LAN Connecting and Configuring the LAN To mount the logic analyzer NOTE: Before Mounting You need to wait at least 15 seconds after the Analyzer Configuration menu is displayed before attempting to mount. If you try to mount too soon, you will receive an error message.
Page 505 Connecting and Configuring the LAN Connecting and Configuring the LAN • UNIX For UNIX, use your network’s command for an NFS mount. For example: mount [analyzer name:]/[control|data][mount point] Some UNIX workstations will not accept a straight IP address. You must add an aliased name for the logic analyzer to the host file, then use that name in your mount command.
Page 506 Connecting and Configuring the LAN Connecting and Configuring the LAN...
Page 507: Accessing The Logic Analyzer File System Using The Lan
Accessing the Logic Analyzer File System Using the LAN...
Page 508: Accessing The Logic Analyzer File System Using The Lan
Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN This chapter shows you how to: • Mount the file system via NFS. •...
Page 509: To Mount The File System Via Nfs
Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN To mount the file system via NFS NOTE: The logic analyzer must be on and completely booted up before you can mount the file system. Once power is applied and the Analyzer Configuration menu is displayed, allow an additional 15 seconds before attempting to mount the system.
Page 510 Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN Mounting the logic analyzer on a UNIX computer Example To mount the analyzer named "1660E_1" as the control user to a directory on your computer named /logic, enter the following command at the UNIX command line: mount 1660E_1:/control /logic After you have entered this command, you will be able to see the logic...
Page 511 Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN From Computers Running the MS-DOS Operating System NOTE: To use the logic analyzer interface in an MS-DOS environment, you need to install a program on your PC that allows you to use NFS protocol. One such program is PC-NFS by SunSoft Inc.
Page 512 Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN From Computers Running MS Windows NT NOTE: To use the logic analyzer in an MS Windows NT environment, you need to install a program on your PC that allows you to use NFS protocol. One such program is PC-NFS by SunSoft Inc.
Page 513 Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN 3 In the Path field, type the name of the server that the logic analyzer system is mounted on, followed by the analyzer’s name or IP address.
Page 514: To Access The File System Via Ftp
Accessing the Logic Analyzer File System Using the LAN Accessing the Logic Analyzer File System Using the LAN To access the file system via ftp To access the logic analyzer’s file system using ftp, enter the following command on your computer: ftp [symbolic name|IP address] The symbolic name is the host name of the logic analyzer as set up by your system administrator.
Page 515 Using the LAN’s X Window Interface...
Page 516: Using The Lan's X Window Interface
Using the LAN’s X Window Interface Using the LAN’s X Window Interface Using the LAN’s X Window Interface This chapter shows you how to: • Start the interface. • Close the interface. • Load the custom fonts. Using the Mouse and Keyboard Once you have started the XWindow interface and are displaying it on your computer running the Xserver, you can use your computer’s keyboard and mouse to control the logic analyzer interface in the same...
Page 517: To Start The Interface From The Front Panel
Using the LAN’s X Window Interface Using the LAN’s X Window Interface To start the interface from the front panel From the Logic Analyzer Front Panel 1 Start the Xserver software on your host computer. 2 On your Xserver, enable analyzer-initiated windows. Most Xserver packages have a security feature which stops unwanted client-initiated windows from being displayed.
Page 518 Using the LAN’s X Window Interface Using the LAN’s X Window Interface 4 In the X-Window Settings menu that pops up, enter the IP address of the XWindows server, the display number, and the screen number. These values are saved for the next time you initiate an X Window. The display number and the screen number are usually 0.
Page 519: To Start The Interface From The Computer
Using the LAN’s X Window Interface Using the LAN’s X Window Interface To start the interface from the computer 1 On your Xserver, enable analyzer-initiated windows. Most Xserver packages have a security feature which stops unwanted client-initiated windows from being displayed. On computers running the UNIX operating system, you can enable analyzer-initiated windows by entering the xhost command: xhost +<analyzer IP address>...
Page 520 Using the LAN’s X Window Interface Using the LAN’s X Window Interface Pseudo telnet method using a UNIX computer Example To enable windows to be initiated from the logic analyzer named lp1660E, enter the following command on the computer running the Xserver : xhost +lp1660E To connect to the command parser socket of the logic analyzer named...
Page 521 Using the LAN’s X Window Interface Using the LAN’s X Window Interface ftp method using a UNIX computer Example File transfer protocol (ftp) can be used to start the X Window interface from either a UNIX computer or a PC. The logic analyzer is named lp1660E in this example.
Page 522: To Close The Interface
Using the LAN’s X Window Interface Using the LAN’s X Window Interface To close the interface From the XWindow Interface or Front Panel 1 Go to the System External I/O menu. 2 Select the Disconnect field. The interface on your Xserver closes, and the Disconnect field changes to Connect.
Page 523: To Load The Custom Fonts
Using the LAN’s X Window Interface Using the LAN’s X Window Interface To load the custom fonts 1 From the computer running your Xserver software, access the logic analyzer’s file system. Refer to the "Accessing the Logic Analyzer File System" chapter. 2 Copy the SM165.BDF and LG165.BDF files from the analyzer’s \system\disk\hard\system directory to a directory on your computer.
Page 524 Using the LAN’s X Window Interface Using the LAN’s X Window Interface Loading the fonts using ftp and UNIX Example Suppose you have a UNIX computer running your Xserver software. Go to the directory where you want to install the custom fonts. As the data user, ftp to the analyzer and copy SM165.BDF and LG165.BDF from the \system\disk\hard\system directory to your computer.
Page 525 Using the LAN’s X Window Interface Using the LAN’s X Window Interface Close the analyzer’s XWindow interface and re-start it. You should now see the same fonts that are used on the logic analyzer’s front panel display. The xset commands must either be repeated each time X is restarted or the fonts must be installed in the default X11 font directory, typically found in /usr/lib/X11/fonts/misc.
Page 526: Additional Information
Using the LAN’s X Window Interface Using the LAN’s X Window Interface Additional Information Color The X Window that appears on your X Server is in color. If another application such as a Web browser is using many colors, the X Window may be unreadable when it appears.
Page 527: Retrieving And Restoring Data Using The Lan
Retrieving and Restoring Data Using the LAN...
Page 528: Retrieving And Restoring Data Using The Lan
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN This chapter shows you how to: • Copy ASCII measurement data. • Copy raw measurement data. • Restore raw measurement data. •...
Page 529: To Copy Ascii Measurement Data
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To copy ASCII measurement data 1 Set up the measurement you want to make, and run the analyzer to acquire data. For more information on setting up measurements, see the Logic Analyzer section of this book.
Page 530: To Copy Raw Measurement Data
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To copy raw measurement data 1 Set up the measurement you want to make, and run the analyzer to acquire data. For more information on setting up measurements, see the Logic Analyzer section of this book.
Page 531: To Restore Raw Measurement Data
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To restore raw measurement data 1 Access the analyzer’s file system as the control user. Refer to the chapter "Accessing the Logic Analyzer File System". 2 Copy the data.raw file to the appropriate \slot_{x} directory. For analyzer data, this would be the \slot_a directory.
Page 532: To Strip Lif Structure From Raw Measurement Data
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To strip LIF structure from raw measurement data • Write a program that strips LIF structure from raw data files. You may want to convert the data.raw file into a format that is consistent with the file format transmitted from the logic analyzer via HP-IB.
Page 533 Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN This C program strips the LIF structure from the data.raw file. Example #include <stdio.h> main(int argc, char *argv[] ) char buffer[256] ; int len ; int count = 0 ; while (( len = read( 0, buffer, 256 ))>0 ) { count++ ;...
Page 534: To Copy Screen Images From \System\Graphics
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To copy screen images from \system\graphics 1 Access the logic analyzer’s file system. Refer to the chapter "Accessing the Logic Analyzer File System". 2 Set up the screen you want to copy. 3 Copy the screen image file from the \system\graphics directory.
Page 535: To Copy Status Information From \Status
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To copy status information from \status 1 Access the logic analyzer’s file system. Refer to the chapter "Accessing the Logic Analyzer File System". 2 Copy the appropriate file from the \status directory. The \status directory contains the following ASCII files: •...
Page 536 Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN An example frame.txt file: Example Analyzer name: LP LAN Analyzer Slot Module Name Code Version Card ID Code ====== =========== ============ ============ System V01.00 slot_a Analyzer V01.00 An example mount.txt file: Example...
Page 537: To Copy Configurations From Setup.raw
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To copy configurations from setup.raw 1 Set up the configuration. You can do this from the XWindow interface or from the front panel. 2 Access the logic analyzer’s file system. Refer to the chapter "Accessing the Logic Analyzer File System".
Page 538: To Restore Configurations
Retrieving and Restoring Data Using the LAN Retrieving and Restoring Data Using the LAN To restore configurations 1 Access the logic analyzer’s file system as the control user. Refer to the chapter "Accessing the Logic Analyzer File System". 2 Copy the setup.raw file to the appropriate directory. For system configurations, this would be the \system directory.
Page 539: Programming The Logic Analyzer Using The Lan
Programming the Logic Analyzer Using the LAN...
Page 540: Programming The Logic Analyzer Using The Lan
Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN You can program the logic analyzer over the Local Area Network (LAN) by sending commands to the \system\program file or by sending commands to the command parser socket.
Page 541: To Set Up For Ethernet Lan Programming
Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN To set up for Ethernet LAN programming Before you can send programming commands to the logic analyzer via the LAN, you must set the controller to Ethernet. 1 In the System External I/O menu, select the Connected To: field in the Controller box.
Page 542: To Enter Commands Directly Using Telnet
Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN To enter commands directly using telnet The syntax of the telnet command is: telnet [symbolic name|IP address] 5025 The symbolic name is the host name of the logic analyzer as set up by your system administrator.
Page 543 Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN Programming the logic analyzer over a telnet connection Example To connect to the logic analyzer named 1660sys, enter: $ telnet 1660sys 5025 The computer responds with: Trying...
Page 544: To Write Programs That Open The Command Parser Socket
Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN To write programs that open the command parser socket The command parser socket of the logic analyzer is 5025. Connection to the command parser socket is, by definition, a control user connection.
Page 545 Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN /* Create an endpoint for communication */ sockfd = socket( AF_INET, SOCK_STREAM, 0 ); /* Initiate a connection on the created socket */ connect(sockfd,(tdSOCKET_ADDR *)&serv_addr, sizeof (serv_addr));...
Page 546 Programming the Logic Analyzer Using the LAN Programming the Logic Analyzer Using the LAN...
Page 547 LAN Concepts...
Page 548: Lan Concepts
LAN Concepts LAN Concepts LAN Concepts This chapter describes: • Directory structure of the logic analyzer's file system • Dynamic files • New fields in the logic analyzer's system menus...
Page 549: Directory Structure Of The Logic Analyzer's File System
LAN Concepts LAN Concepts Directory structure of the logic analyzer’s file system Logic Analyzer Directory Structure setup.raw. Binary configuration files. You can save and restore configurations by copying these files. \slot_x. Analyzer and oscilloscope subdirectories. All benchtop logic analyzers have a \slot_a directory for the state/timing analyzer. The HP 1660ES-series also have a \slot_b directory for the oscilloscope.
Page 550 LAN Concepts LAN Concepts \system\graphics. Image files for the current screen in TIFF, PCX, and Encapsulated PostScript formats. \status. Status information. The directory structure of the logic analyzer is fixed. You cannot create or delete directories or files except under the local hard and flexible disk directories.
Page 551 LAN Concepts LAN Concepts Label Data Files: \slot_a\data.asc\{analyzer name}\{label}.txt. Both analyzer subdirectories contain files corresponding to the labels you have set up in that analyzer’s Format Menu. These files contain the current measurement data for the channels assigned to each label. Both state and timing data are available, and both kinds of data are represented as a column of values.
Page 552: Dynamic Files
LAN Concepts LAN Concepts Dynamic files The logic analyzer’s file system uses dynamic files for configuration information and data. This means that applications such as File Manager or a spreadsheet cannot determine the size of the files until they are retrieved. When you view the file statistics for these files, you will see file sizes of 0 bytes or 1 byte.
Page 553: Lan-Related Fields In The Logic Analyzer's Menus
LAN Concepts LAN Concepts LAN-related fields in the logic analyzer’s menus When your logic analyzer has LAN, several additional menu choices are available. These fields allow you to set up your LAN port and configure the logic analyzer. Controller Connection You can set your logic analyzer to be controlled over the network.
Page 554 LAN Concepts LAN Concepts Time Zone Field With LAN, a field labeled "Time Zone" appears in the Real Time Clock setup menu. The Real Time Clock setup menu is accessed by selecting the Real Time Clock Adjustments field in the System Utilities menu. This field enables you to specify the time difference between your local time and Greenwich Mean Time (Universal Coordinated Time) for network operations.
Page 555 Troubleshooting the LAN Connection...
Page 556: Troubleshooting The Lan Connection
Troubleshooting the LAN Connection Troubleshooting the LAN Connection Troubleshooting the LAN Connection This chapter provides troubleshooting information for the LAN connection. It is arranged in three sections: • Troubleshooting the initial connection • Solutions to common problems • Getting service support...
Page 557: Troubleshooting The Initial Connection
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Troubleshooting the Initial Connection Getting the logic analyzer to work with your network often requires detailed knowledge of your local network software. This section attempts to help you with some common problems, but because of the wide variety of network software available it cannot cover all problems you may encounter.
Page 558 Troubleshooting the LAN Connection Troubleshooting the Initial Connection Packets routinely lost If packets are routinely lost, proceed to the troubleshooting section in this chapter relating to your network. Problems transferring or copying files Copying files out of the logic analyzer •...
Page 559 Troubleshooting the LAN Connection Troubleshooting the Initial Connection • Have any configuration files been modified? • Have any of the following files been deleted or overwritten? UNIX: /etc/hosts /etc/inetd.conf /etc/services PCs: dependent network files If you know or suspect that something has changed on your network, check the changes and adjust the configuration for the LAN interface using the procedures in Chapter 1.
Page 560: Troubleshooting In A Workstation Environment
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Troubleshooting in a workstation environment 1 Verify the communications link. Verify the communications link between the computer and the logic analyzer remote file server using the ping utility. ping [hostname|IP Address] 64 10 Hostname is the name assigned to the logic analyzer remote file server in the node names database (usually /etc/hosts).
Page 561 Troubleshooting the LAN Connection Troubleshooting the Initial Connection • Error Messages If error messages appear, then check the command syntax before continuing with the troubleshooting. If the syntax is correct, then resolve the error messages using your network documentation. If an unknown host error message appears, then check the node names database (usually /etc/hosts) to see that the hostname and IP address are correctly entered.
Page 562: Troubleshooting In An Ms-Dos Environment
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Troubleshooting in an MS-DOS environment 1 Verify the communications link. Verify the communications link between the PC and the logic analyzer using the ping utility or other similar echo request utility. To aid in troubleshooting, go to the Ethernet Statistics menu under LAN Settings on the logic analyzer.
Page 563 Troubleshooting the LAN Connection Troubleshooting the Initial Connection • Error Messages If error messages appear, then check the command syntax before continuing with the troubleshooting. If the syntax is correct, then resolve the error messages using your NFS documentation. Certain PC-based NFS software packages permit the use of hostname in place of the IP address.
Page 564: Troubleshooting In An Ms Windows Environment
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Troubleshooting in an MS Windows environment 1 Verify the communications link. Verify the communications link between the PC and the logic analyzer using the ping utility or other similar echo request utility. To aid in troubleshooting, go to the Ethernet Statistics menu under LAN Settings on the logic analyzer.
Page 565 Troubleshooting the LAN Connection Troubleshooting the Initial Connection • Error Messages If error messages appear, then check the command syntax before continuing with the troubleshooting. If the syntax is correct, then resolve the error messages using your NFS documentation. Certain NFS software packages permit the use of hostname in place of the IP address.
Page 566: Verify The Logic Analyzer Performance
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Verify the logic analyzer performance The logic analyzer performance verification (self-test) is divided into two sections. The first section tests the physical connections such as the cable and termination. The second section tests the internal functions of the LAN interface.
Page 567 Troubleshooting the LAN Connection Troubleshooting the Initial Connection Procedure This procedure verifies the performance of the LAN interface. To check logic analyzer performance, refer to the logic analyzer’s Service Guide. 1 Go to the System External I/O menu. 2 Verify that the LAN Settings box and the X-Window box are available.
Page 568: Status Number
Troubleshooting the LAN Connection Troubleshooting the Initial Connection 9 Exit the Test System. a Select System Test, then select Exit Test from the pop up. b Select Exit Test System. Status Number When you run the LAN Test, the test menu reports a status number. The following figure shows the bit positions of the hexidecimal status word.
Page 569 Troubleshooting the LAN Connection Troubleshooting the Initial Connection The following table describes each bit in the status number. Status Bits Bit 0 The internal registers of the LAN IC are loaded with known test values and then are read. If this bit is not set, it implies that the LAN IC is operating properly and that the microprocessor can communicate with the LAN IC.
Page 570 Troubleshooting the LAN Connection Troubleshooting the Initial Connection Status Bits (continued) Status Bits Bit 6 The TRANS (Transceiver, such as Ethernet transceiver) bit indicates whether the circuitry between the LAN IC and the LAN cable is functioning. If this bit is not set, then the path between the LAN cable and the LAN IC is operating properly.
Page 571: Network Status Information
Troubleshooting the LAN Connection Troubleshooting the Initial Connection Network Status Information The Ethernet Statistics menu supports network troubleshooting through the front-panel. To access the Ethernet Statistics menu: 1 Go to the System External I/O menu. 2 Select LAN Settings 3 Select Ethernet Statistics from the bottom of the pop-up menu. See the Ethernet Statistics information on the next page for the meaning of the various fields.
Page 572 Troubleshooting the LAN Connection Troubleshooting the Initial Connection Information on the Ethernet Statistics menu Status Bits Ether Address The logic analyzer’s Ethernet address. This value is set by the factory and cannot be changed. Subnet Mask The subnet mask being used by the logic analyzer. The logic analyzer queries the network for this value when it is turned on.
Page 573: Solutions To Common Problems
Troubleshooting the LAN Connection Solutions to Common Problems Solutions to Common Problems This section describes common problems you may encounter when using the logic analyzer LAN. It assumes you have been able to connect to the logic analyzer in the past. If this is not so, refer to the previous section first.
Page 574: If You Cannot Mount The Logic Analyzer File System
Troubleshooting the LAN Connection Solutions to Common Problems If you cannot mount the logic analyzer file system If you get a "device busy" message: ❏ Make sure that another user is not already accessing the file system as the control user or connected to the command parser socket. If you get a "stale NFS file handle"...
Page 575: If You Cannot Start The Xwindow Interface
Troubleshooting the LAN Connection Solutions to Common Problems If you get an "already mounted" or "no more mounts available" message: ❏ If you are trying to access the file system as the control user, try accessing the file system as the data user instead. If another user is currently accessing the logic analyzer file system as the control user, you will not be able to access the file system as the control user.
Page 576: If You Cannot Copy Files From The Logic Analyzer
Troubleshooting the LAN Connection Solutions to Common Problems If you cannot copy files from the logic analyzer If you can only copy a few bytes of a file: ❏ Copy the file of interest to your PC or workstation, and use the new, local copy as your working copy.
Page 577: If You Get An "Operation Timed-Out" Message
Troubleshooting the LAN Connection Solutions to Common Problems If you get an "operation timed-out" message ❏ Check the LAN connection between the computer and logic analyzer. Refer to "If you cannot connect to the logic analyzer" in this section. ❏ Increase the file time-out value on your PC or workstation. If the logic analyzer begins to operate slowly The logic analyzer may operate more slowly if multiple users are trying to use the system at the same time.
Page 578: If All Else Fails
Troubleshooting the LAN Connection Solutions to Common Problems If all else fails ❏ Contact your system administrator. ❏ If you still cannot solve the problem, contact an HP Service Center for repair information.
Page 579: Getting Service Support
Troubleshooting the LAN Connection Getting Service Support Getting Service Support This section provides information about support services. HP on-site service With HP on-site service, HP pays for parts, labor, and travel to have an HP service representative visit your site for repairing equipment under warranty.
Page 580 Troubleshooting the LAN Connection Getting Service Support...
Page 581: Symbol Utility Introduction
Section 3 Symbol Utility...
Page 583 Symbol Utility Introduction...
Page 584: Symbol Utility Introduction
Symbol Utility Introduction Symbol Utility Introduction Symbol Utility Introduction The Symbol Utility provides you with a new way to view your logic analysis data. The Symbol Utility maps trace data onto meaningful, symbolic names. The symbols can include variable names, procedure or function names, and source file names and line numbers.
Page 585: Supported Symbol File Formats
Symbol Utility Introduction Symbol Utility Introduction Supported Symbol File Formats The Symbol Utility will support OMF files in the following formats: ELF/DWARF. This OMF is a portable format consisting of ELF (Executable and Linkable Format) and DWARF (Debugging Information Format) for various processors, including Intel 80960, PowerPC, and MIPS.
Page 586 Symbol Utility Introduction Symbol Utility Introduction OMF86. This OMF is produced by language tools for Intel 80x86 series and Pentium microprocessors running in real mode only. OMF96. This OMF is produced by language tools for the Intel 80196 family of processors. TI-COFF.
Page 587: Symbol Utility Section Overview
Symbol Utility Introduction Symbol Utility Introduction Symbol Utility section overview The chapters in the Symbol Utility section of this User’s Guide provides a detailed description of the features. The following is a brief description of each chapter. Getting Started. Describes how to locate the menus associated with the Symbol Utility.
Page 588 Symbol Utility Introduction Symbol Utility Introduction...
Page 589: Getting Started With The Symbol Utility
Getting Started with the Symbol Utility...
Page 590: Getting Started With The Symbol Utility
Getting Started with the Symbol Utility Getting Started with the Symbol Utility Getting Started with the Symbol Utility You can use the OMF Symbol Load menu to load Object Module Format (OMF) symbol files into the analyzer. Once you have loaded the files, you can view the symbols in the Listing and Waveform menus.
Page 591: To Access The Symbol File Load Menu
Getting Started with the Symbol Utility Getting Started with the Symbol Utility To Access the Symbol File Load Menu To begin working with symbols in the logic analyzer, you need to load symbol files into the system. The OMF Symbol Load menu is used to do this.
Page 592 Getting Started with the Symbol Utility Getting Started with the Symbol Utility 3 Select the Specify Database field in the Symbol menu.
Page 593: Method 2: Using The Symbol Field In The Format Menu
Getting Started with the Symbol Utility Getting Started with the Symbol Utility Method 2: Using the Symbol Field in the Format Menu 1 Go to the Analyzer Format menu. 2 In the Format menu, select the Symbols field. 3 In the Symbols pop-up, select the large field at the top of the display.
Page 594 Getting Started with the Symbol Utility Getting Started with the Symbol Utility The OMF Symbol Load menu appears. Use this menu to load an Object Module Format (OMF) file into the logic analyzer. OMF Symbol Load Menu...
Page 595: To Access The Symbol Browser
Getting Started with the Symbol Utility Getting Started with the Symbol Utility To Access the Symbol Browser 1 Go to the Analyzer Trigger menu. 2 Set the base for the label that you want to work with to "symbol." 3 Select a trigger term corresponding to the label and pattern term that you want to use.
Page 596 Getting Started with the Symbol Utility Getting Started with the Symbol Utility The OMF Symbol Browser menu appears. Use this menu to select an OMF symbol as a trigger term.
Page 597: Using The Symbol Utility
Using the Symbol Utility...
Page 598: To Generate A Symbol File
Using the Symbol Utility To generate a symbol file In order to view symbols from your software in the Listing or Waveform menus of the logic analyzer, you need to create a symbol file in one of the formats that are supported by the Symbol Utility. If your language tools cannot generate an OMF symbol file which is compatible with the Symbol utility, you may create a symbol file in the General-Purpose ASCII (GPA) file format.
Page 599: To Load A Symbol File
Using the Symbol Utility To Load a Symbol File 1 Access the OMF Symbol Load menu. There are two methods available to access this menu. See "To Access the Symbol File Load Menu," on page 591 for more information. 2 Select the disk drive that contains the symbol file. 3 Select the Label field and choose the label that you want to map the OMF symbols to.
Page 600 Using the Symbol Utility 4 Select the OMF File field. In the pop-up, turn the knob to highlight the desired file name. Select the Select field to choose the file. If necessary, use the knob and the Select field to choose a different directory.
Page 601 Using the Symbol Utility The symbol file is loaded into the analyzer. You can load several symbol files into the analyzer. When you load a symbol file, a database file is created by the logic analyzer. Database files have an extension ".ns". If your OMF file was loaded from the hard disk drive, the database file will appear in the same subdirectory as your OMF file.
Page 602: To Display Symbols In The Trace List
Using the Symbol Utility To Display Symbols in the Trace List 1 Load the appropriate symbol file. 2 Display the trace listing in the Listing menu of the logic analyzer.
Page 603 Using the Symbol Utility 3 Select the base of the ADDR label. If you have loaded the OMF symbols into a label other than ADDR, select the base for that label. 4 Choose Symbol from the base pop-up field. NOTE: If you have created User Symbols that overlap with the OMF symbols, the User Symbols take precedence and will be displayed in the listing instead of the OMF symbols.
Page 604: To Trigger On A Symbol
Using the Symbol Utility To Trigger on a Symbol You must load a symbol file into the analyzer before you can trigger on OMF symbols. 1 Go to the Trigger Menu. 2 Set the base of the label that you want to specify a trigger term with to Symbol.
Page 605 Using the Symbol Utility 3 Select a trigger term that you want to use. The trigger term is the field that corresponds to the term column on the left side of the display, and the label row in the center of the display.
Page 606 Using the Symbol Utility 5 Use the knob to scroll through the list of symbols and pick the one that you want. Select Done. The trigger term is now defined as one of your OMF symbols. 6 Use the symbol term in the trigger specification to trigger the logic analyzer.
Page 607: To View A List Of Symbol Files Currently Loaded Into The System
Using the Symbol Utility To View a List of Symbol Files Currently Loaded into the System 1 Access the OMF Symbol Load menu. There are two methods available to access this menu. See "To Access the Symbol File Load Menu" on page 591 for more information. 2 Select the Current Loaded Files field, in the bottom left corner of the display.
Page 608: To Remove A Symbol File From The System
Using the Symbol Utility To Remove a Symbol File From the System 1 Access the OMF Symbol Load menu. There are two methods available to access this menu. See "To Access the Symbol File Load Menu" page 591 for more information. 2 Select the Current Loaded Files field, in the bottom left corner of the display.
Page 609 Symbol Utility Features and Functions...
Page 610: Symbol Utility Features And Functions
Symbol Utility Features and Functions Symbol Utility Features and Functions Symbol Utility Features and Functions The Symbol Utility adds two main menus to your logic analyzer. They are the Symbol File Load menu and the Symbol Browser menu. This chapter describes the features and functions of both of these menus. The symbol utility also provides a General-Purpose ASCII (GPA) symbol file format that you can use if your language tool chain does not produce OMF files in one of the supported formats.
Page 611: The Omf Symbol File Load Menu
Symbol Utility Features and Functions The OMF Symbol File Load Menu The OMF Symbol File Load Menu The OMF Symbol Load menu is used to load the OMF files containing the symbols that you want into the logic analyzer. OMF Symbol File Load Menu...
Page 612: Omf File Field
Symbol Utility Features and Functions The OMF Symbol File Load Menu OMF File Field The OMF File field is used to select the OMF file that you would like to load into the system. When you initially access the OMF Symbol Table menu, the OMF File field will be blank.
Page 613: Label Field
Symbol Utility Features and Functions The OMF Symbol File Load Menu Label Field Use this field to specify the data label that the symbols will correspond to. In most cases you will use the ADDR label, since you will be loading symbols into the system that correspond to the address bits of the processor that you are working with.
Page 614: Load Field
Symbol Utility Features and Functions The OMF Symbol File Load Menu Load Field Select this field to load the symbol file into the logic analyzer. During the load process, a symbol database file with a ".ns" extension will be created by the Symbol Utility. You can load multiple symbol databases into the system at the same time.
Page 615: Current Loaded Files Field
Symbol Utility Features and Functions The OMF Symbol File Load Menu Current Loaded Files Field Select this field to view a list of the symbol files that are currently loaded. The Loaded Database Files pop-up menu provides a Delete field that you can use to remove a symbol database. Use the knob to highlight the symbol file that you want to remove.
Page 616: Section Relocation Option
Symbol Utility Features and Functions The OMF Symbol File Load Menu Section Relocation Option The Section Relocation option allows you to add offset values to the symbols in an OMF file. Use this option if some of the sections or segments of your code is relocated in memory at run-time.
Page 617 Symbol Utility Features and Functions The OMF Symbol File Load Menu Set Absolute Section Location Use this option to set an absolute address for the start of the selected section, when you know the run-time address of the section. Offset This Section Use this option to add an offset to the start of the selected section, when you know the relocation offset of the section.
Page 618: The Omf Symbol Browser Menu
Symbol Utility Features and Functions The OMF Symbol Browser Menu The OMF Symbol Browser Menu The OMF Symbol Browser menu allows you to browse through the symbols that have been loaded into the analyzer. You can use the symbols as trigger terms in the Trigger menu. Search features and wildcard characters are available to help you find the symbols that you want.
Page 619: Symbol Type Selection Field (User Vs. Omf)
Symbol Utility Features and Functions The OMF Symbol Browser Menu Symbol Type Selection Field (User vs. OMF) This field allows you to choose between the two types of symbols available in the logic analyzer. The choices are: • "User Symbols," corresponding to the symbols that you can define in the Format menu, and •...
Page 620: Find Field
Symbol Utility Features and Functions The OMF Symbol Browser Menu Find Field Use this field to locate particular symbols in the symbol databases that you would like to use in a trigger specification. When you first access the OMF Symbol Table menu, the Find field will display an asterisk (*). The asterisk is a wildcard character that you can use in browsing the symbol database for the symbol that you want.
Page 621 Symbol Utility Features and Functions The OMF Symbol Browser Menu Question mark wildcard (?) If you are using a keyboard to control your logic analyzer, you can use the question mark wildcard character. A question mark represents "any single character." You can use more than one question mark in a symbol database search;...
Page 622: Browse Results Display
Symbol Utility Features and Functions The OMF Symbol Browser Menu Browse Results Display This area of the display shows you a list of the symbols that satisfy the search criteria that you have specified. Depending on the mode selected in the large field at the bottom of the display, the browse results display will show file names and line numbers, or the symbol names.
Page 623: Align To Xx Byte Option
Symbol Utility Features and Functions The OMF Symbol Browser Menu Align to xx Byte Option Most processors do not fetch instructions from memory on byte boundaries. In order to trigger a logic analyzer on a symbol at an odd- numbered address, the address must be masked off. The "Align to Byte"...
Page 624: Offset Option
Symbol Utility Features and Functions The OMF Symbol Browser Menu Offset Option The Offset option allows you to add an offset value to the starting point of the symbol that you want to use as a trigger term. You might do this in order to trigger on a point in a function that is beyond the preamble of the function, or to trigger on a point that is past the prefetch depth of the processor.
Page 625: Context Display
Symbol Utility Features and Functions The OMF Symbol Browser Menu Context Display The Context display, just below the Find field, indicates the original OMF source file for the symbol that is currently highlighted in the Browse Results display. A: indicates the flexible disk drive. C: indicates the hard disk drive.
Page 626: Symbol Mode Field
Symbol Utility Features and Functions The OMF Symbol Browser Menu Symbol Mode Field The OMF symbols can be viewed in one of two formats: • as global and local symbols, or • as source file names with line numbers Select the large field at the bottom of the display to toggle between the two modes.
Page 627: The General-Purpose Ascii File Format
Symbol Utility Features and Functions The General-Purpose ASCII File Format The General-Purpose ASCII File Format The Symbol Utility supports a General-Purpose ASCII (GPA) file format. If your language tool chain does not produce one of the supported file types, you can create a GPA file to define symbols for the Symbol Utility.
Page 628: Creating A Gpa Symbol File
Symbol Utility Features and Functions The General-Purpose ASCII File Format Creating a GPA Symbol File You can create a GPA symbol file using any text editor that supports ASCII format text. Each entry in the file you create must consist of a symbol name followed by an address or address range.
Page 629: Gpa File Format
Symbol Utility Features and Functions The General-Purpose ASCII File Format GPA File Format A GPA file can be divided into records using record headers. The different records allow you to specify different kinds of symbols, with differing characteristics. A GPA file can contain any of the following kinds of records: •...
Page 630 Symbol Utility Features and Functions The General-Purpose ASCII File Format Here is a GPA file that contains several different kinds of records. Example [SECTIONS] prog 00001000..0000101F data 40002000..40009FFF common FFFF0000..FFFF1000 [FUNCTIONS] main 00001000..00001009 test 00001010..0000101F [VARIABLES] total 40002000 4 value 40008000 4 [SOURCE LINES] File: main.c...
Page 631: Sections
Symbol Utility Features and Functions The General-Purpose ASCII File Format Sections Format [SECTIONS] section_name start..end attribute Use SECTIONS to define symbols for regions of memory, such as sections, segments, or classes. A symbol representing the name of the section. section_name The first address of the section, in hexadecimal.
Page 632 Symbol Utility Features and Functions The General-Purpose ASCII File Format Example [SECTIONS] prog 00001000..00001FFF data 00002000..00003FFF display_io 00008000..0000801F NONRELOC NOTE: If you use section definitions in a GPA symbol file, any subsequent function or variable definitions must fall within the address ranges of one of the defined sections.
Page 633: Functions
Symbol Utility Features and Functions The General-Purpose ASCII File Format Functions Format [FUNCTIONS] func_name start..end Use FUNCTIONS to define symbols for program functions, procedures, or subroutines. A symbol representing the function name. func_name The first address of the function, in hexadecimal. start The last address of the function, in hexadecimal.
Page 634: Variables
Symbol Utility Features and Functions The General-Purpose ASCII File Format Variables Format [VARIABLES] var_name start [size] var_name start..end You can specify symbols for variables, using the address of the variable, the address and the size of the variable, or a range of addresses occupied by the variable.
Page 635: Source Line Numbers
Symbol Utility Features and Functions The General-Purpose ASCII File Format Source Line Numbers Format [SOURCE LINES] File: file_name line# address Use SOURCE LINES to associate addresses with lines in your source files. The name of a file. file_name The number of a line in the file, in decimal. line# The address of the source line, in hexadecimal.
Page 636: Start Address
Symbol Utility Features and Functions The General-Purpose ASCII File Format Start Address Format [START ADDRESS]address address The address of the program entry point, in hexadecimal. Example [START ADDRESS] 00001000 Comments Format #comment text Any text following a # character is ignored by the Symbol Utility and can be used to comment the file.
Page 637 Index Symbols analyzer problems attaching to another instrument capacitive loading * character intermittent data errors branch conditions .ns files no activity on activity indicators selectively store loading Branches Taken Stored / Not ? character no trace list display Stored field unwanted triggers Break Down Macros / Restore analyzer Trigger menu...
Page 638 Index Label vs. State connecting grabbers to probes moving clean connecting probe cables custom fonts for X logic analyzer to the logic analyzer clock circuit connecting the probe tip assembly pattern generator board theory to the probe cable data connection copying Clock Inputs display problems...
Page 639 Index description File Timeout functions Done key file types General_Purpose ASCII drive name file versions format dynamic files filename endings fuse problems with SUN operating systems Gateway Address .EPS gateway IP address .PCX edge terms General-Purpose ASCII format .TIF Encapsulated PostScript files filenames ENDEC (Encoder/Decoder) bit address format...
Page 640 Index HP-IB interface LAN port mounting via NFS LAN Settings menu logical drive name setting limitations of programming over login name the LAN Line Number field loop register line numbers LP_END illegal configuration GPA file LP_EXIT interleave trace lists line numbers of an acquisition LP_START intermittent response from ping Line Power Module...
Page 641 Index measurement modules multiple symbol files creating choosing currently loaded memory deleting trigger position versions network Memory Length field OMF Symbol Table configuring the logic analyzer 1670-series browser menu menus browser menu, accessing connecting load menu, accessing mounting Min and Max scaling fields OMF Symbol Table menus statistics mixed display...
Page 642 Index edge trigger mode Peak-to-Peak Voltage Format menu Grid field Period hardware instructions immediate trigger mode Positive Pulse Width (+Width) initialization sequence manual time markers instructions manual/automatic time markers Preshoot and Overshoot label Rise time load a configuration Mode field oscilloscope probes macro name Mode/Arm menu...
Page 643 Index not available in MS-DOS termination adapter Rx bit Pod clock field programming pod threshold field setting up pod thresholds PROTECT/UNPROTECT switch sampling rates point-to-point Saturation port ID setting command parser socket save a configuration PostScript files save a trace list in ASCII format power requirements pattern generator board theory power-up tests...
Page 644 Index setting 1660-series system configuration color state acquisitions System Performance Analysis comparing description saturation State Histogram example labels setting the manual/automatic time State Histogram mode measurement processes markers using operating characteristics oscilloscope state listings sampling and sorting setup.raw interleaving State Histrogram mode setup.raw files State Overview mode State Overview example...
Page 645 Index oscilloscope board trigger examples trigger specification pattern generator board capture a write of known bad data changing TIFF files to a particular variable trigger term Time Correlation capture the waveform of a glitch triggering on a symbol Time Interval mode browser menu using detect a glitch...
Page 646 Index versions of OS versions of symbol files View field View Files and Line Numbers valid line numbers View Globals and Locals viewing OMF symbols Voltage Markers options oscilloscope W Window interface anomalies waveform using Waveform display waveform label field Waveform menu waveform menu wildcard characters...
Page 647 © Copyright Hewlett-Packard • Service instructions are for Safety Safety Symbols Company 1998 trained service personnel. To This apparatus has been designed All Rights Reserved. avoid dangerous electric shock, and tested in accordance with do not perform any service unless IEC Publication 1010, Safety Reproduction, adaptation, or qualified to do so.
Page 648 Product Warranty No other warranty is About this edition expressed or implied. This Hewlett-Packard product This is the HP 1660E/ES/EP and UNIX is a registered trademark in Hewlett-Packard specifically has a warranty against defects in 167E User’s Guide. the United States and other disclaims the implied material and workmanship for a countries, licensed exclusively...
Page 649 DECLARATION OF CONFORMITY according to ISO/IEC Guide 22 and EN 45014 Manufacturer’s Name: Hewlett-Packard Company Manufacturer’s Address: Colorado Springs Division 1900 Garden of the Gods Road Colorado Springs, CO 80907 USA declares, that the product Product Name: Logic Analyzer/Oscilloscope/Pattern Generator Model Number(s): HP 1660E, 1661E, 1662E, 1663E HP 1660ES, 1661ES, 1662ES, 1663ES...
Page 650 Product Regulations Safety IEC 1010-1:1990+A1 / EN 61010-1:1993 UL3111 CSA-C22.2 No. 1010.1:1993 This Product meets the requirement of the European Communities (EC) EMC Directive 89/336/EEC. Emissions EN55011/CISPR 11 (ISM, Group 1, Class A equipment) IEC 555-2 and IEC 555-3 Immunity EN50082-1 Code Notes...

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