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Questionable Status Integrity Register
Figure 2-17. Questionable Status Integrity Register
+
To
Status
The Questionable Status Integrity Register is used to determine the
specific event that sets bit 9 in the Questionable Status Register. The
Questionable Status Integrity Register consists of the following
registers:
The Questionable Status Integrity Condition Register contains the
following bits:
Chapter 2
Reserved
Reserved
Reserved
Measurement Uncal
IF/ADC Over Range
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Invalid Data
Reserved
Reserved
Always Zero (0)
Status
QUEStionable
INTegrity
15
14 13
Condition Register
Status
QUEStionable
INTegrity
15
14 13
Positive
Transition Filter
Status
QUEStionable
INTegrity
15
14 13
Negative
Transition Filter
Status QUEStionable
INTegrity
15
14 13
Event Register
&
&
&
Status QUEStionable
CALibration
Event
15
14 13
Enable Register
Questionable Register Bit #9
Questionable Status
Questionable Status
Questionable Status
Questionable Status
Questionable Status
Using the Analyzer Status Registers
12
11
10
9
8
7
6
5
12
11
10
9
8
7
6
5
12
11
10
9
8
7
6
5
12
11
10
9
8
7
6
5
&
&
&
&
&
&
&
&
12
11
10
9
8
7
6
5
Integrity condition register
Integrity positive transition filter
Integrity negative transition filter
Integrity event register
Integrity event enable register
HP ESA Status Registers
4
3
2
1
0
4
3
2
1
0
4
3
2
1
0
4
3
2
1
0
&
&
&
&
&
4
3
2
1
0
ck749a
2-31
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