HP ESA-E Series Programmer's Manual page 56

HP ESA Status Registers
Using the Analyzer Status Registers
:STATus:QUEStionable:FREQuency:CONDition? The response will be
the decimal sum of the bits which are set to 1.
The negative and positive transition filters specify which types of bit
state changes in the condition register will set corresponding bits in the
event register. The changes may be positive (from 0 to 1) or negative
(from 1 to 0). Send the command
:STATus:QUEStionable:FREQuency:NTRansition <num> (negative
transition) or :STATus:QUEStionable:FREQuency:PTRansition
<num> (positive transition) where <num> is the sum of the decimal
values of the bits you want to enable.
The Questionable Status Frequency event register latches transition
events from the condition register as specified by the transition filters.
Event registers are destructive read-only. Reading data from an event
register will clear the content of that register. To query the event
register, send the command
:STATus:QUEStionable:FREQuency[:EVENt]?
Figure 2-13
15
Bit Number
STATus:QUEStionable:FREQuency:ENABle <num>
STATus:QUEStionable:FREQuency:ENABle?
Questionable
The Questionable Status Frequency event enable register lets you
choose which bits will set the summary bit (bit 5 of the Questionable
Status Register) to 1. Send the command
:STATus:QUEStionable:FREQuency:ENABle <num> where <num> is the
sum of the decimal values of the bits you want to enable. For example,
to enable bit 1 and bit 5 so that whenever either of those bits is set to 1,
the Questionable Status Frequency summary bit of the Questionable
Status Condition Register will be set to 1, send the command
:STATus:QUEStionable:FREQuency:ENABle 34 (32 + 2). The
command :STATus:QUEStionable:FREQ:ENABle? returns the decimal
value of the sum of the bits previously enabled with the
:STATus:QUEStionable:FREQuency:ENABle <num> command.
2-26
14 13 12 11 10 9
Status Frequency Event Enable Register
8 6 5 4 3 2 1 0
7
ck773a
Chapter 2