HP ESA Status Registers
Using the Analyzer Status Registers
The Questionable Status Power Condition Register contains the
following bits:
Figure 2-9
15
Bit Number
Questionable
2-22
Questionable Status Power
14
13
12
11
10
9
STATus:QUEStionable:POWer:CONDition?
Status
Power Condition Register
Bit
Description
0
Reserved. These bits are not used by the analyzer, but are for
future use with other HP products.
1
A 1 in this bit position indicates that the source (tracking
generator) output is unlevelled.
2
A 1 in this bit position indicates that the local oscillator (LO) in
the source (tracking generator) is unlevelled.
3
A 1 in this bit position indicates that the analyzer local oscillator
(LO) is unlevelled.
4
A 1 in this bit position indicates that the 50 MHz amplitude
reference signal is unlevelled.
5
Reserved. These bits are not used by the analyzer, but are for
future use with other HP products.
6
A 1 in this bit position indicates that the input overload protection
(HP ESA models E4401B and E4411B only) is tripped.
7
A 1 in this bit position indicates that the first local osillator (LO)
output is unlevelled.
8–14
Unused. These bits are always set to 0.
15
Always Zero (0).
event enable register
8
7
6 5 4 3 2 1 0
ck770a
Chapter 2