Xilinx RocketIO User Manual page 5

Date Version
02/24/04 2.3
05/20/04 2.3.1
06/24/04 2.3.2
UG024 (v2.3.2) June 24, 2004
•
Table 2-3, page 41: Added FG676 row to BREFCLK Pin Numbers.
•
Figure 2-4, page 47: Added note above Figure 2-4 stating, "These local MGT clock input
inverters, shown and noted in Figure 2-4, are not included in the FOUR_BYTE_CLK
templates.
•
Section"RXRECCLK" in Chapter
changes monotonically and how the recovered bit clock is derived.
• Section
"Data Path Latency" in Chapter
configurations of the MGT, both the transmit and receive data path latencies vary."
• Section
"RXBUFSTATUS" in Chapter
•
Figure 3-1, page 101: Replaced old Figure 3-1, page 101, with new
"Differential Amplifier."
•
Figure 3-6, page 105: Added new Figure 3-6, page 105, showing "MGT Receiver."
•
Table 3-4, page 106: Added text to CDR Parameters (TLOCK parameter in Conditions
column) and edited Note 3.
• Section "Voltage Regulation" in Chapter
(LT1963A, LT1964).
• Section
"Passive Filtering" in Chapter
•
Figure 3-8, page 109: Replaced old Figure 3-8 with new figure showing "Power Filtering
Network on Devices with Internal and External Capacitors."
•
Table 3-6, page 110: Added Device and Package combinations table.
•
Figure 3-9, page 110: Added new Figure 3-10, page 110, showing "Example Power Filtering
PCB Layout for Four MGTs, in Device with Internal Capacitors, Bottom Layer." Modified the
text describing Figure 3-9, page
•
Figure 3-10, page 111: Replaced old Figure 3-10 with new figure showing "Example Power
Filtering PCB Layout for Four MGTs, in Device with External Capacitors, Top Layer."
Removed the text describing old Figure 3-10.
•
Figure 3-11, page 112: Replaced old Figure 3-11 with new figure showing "Example Power
Filtering PCB Layout for Four MGTs, in Device with External Capacitors, Bottom Layer."
Removed the text describing old Figure 3-11.
•
Table 3-7, page 115: Added V
• Changed the value of TRCLK/RFCLK in
• Modified
Figure 2-3.
www.xilinx.com
1-800-255-7778
Revision
2: Added paragraph to section explaining how RXRECCLK
2: Revised first sentence to read: "With the many
2: Revised the description of RXBUFSTATUS.
3: Added Linear Technology part numbers
3: Added new cap rules for RocketIO transceiver.
110.
and V voltages for different coupling environments.
TRX TTX
Table 3-4.
RocketIO™ Transceiver User Guide
Figure 3-1 showing