Xilinx RocketIO User Manual page 110

R
Table 3-6: Device and Package Combinations showing Devices with RocketIO Power Filtering Capacitors
Internal to the Package and Externally Mounted on the PCB
XC2VP2 XC2VP4
FG256 External External
FG456 External External
FF672 Internal Internal
FG676
FF896
FF1152
FF1148
FF1517
FF1704
FF1696
For devices that do not contain filtering capacitors in their package, the 0.22 µF capacitors must be
placed within 1 cm of the pins they are connected to.
Figure
four transceivers (in one case in a package with internal capacitors, in another case in a package with
external capacitors).
The device in
edge (rows A/B), and four on the bottom edge (rows AE/AF). This device contains internal
capacitors, so it is only necessary to have ferrite beads on the PCB.
PCB layer, with lands for ferrite beads of the VTTX, VTRX, AVCCAUXTX, and AVCCAUXRX
supplies. The ferrite beads are mounted at the sixteen "L[n]" locations.
The device in
total – four on the top edge, and four on the bottom edge. This device does not have capacitors inside
110
XC2VP7 XC2VP20
External
Internal
External
Internal Internal
Internal
3-9, Figure 3-10, and Figure 3-11
Figure 3-9 is in an FF672 package, which has eight transceivers total—four on the top
Figure 3-9: Example Power Filtering PCB Layout for Four MGTs, in Device with
Internal Capacitors, Bottom Layer
Figure 3-10 and
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Chapter 3: Analog Design Considerations
XC2VP30 XC2VP40
External External
Internal
Internal Internal
No MGTs
Internal
show example layouts of the power filtering network for
Figure 3-11 is an FG456 package, which also has eight transceivers
XC2VP50 XC2VP70 XC2VP100
Internal
No MGTs
Internal Internal
Internal
No MGTs
Figure 3-9 shows the bottom
RocketIO™ Transceiver User Guide
UG024 (v2.3.2) June 24, 2004
Internal