Xilinx RocketIO User Manual page 22

R
Table 1-3: Serial Baud Rates and the SERDES_10B Attribute
PACKAGE
PINS
AVCCAUXRX
2.5V RX
VTRX
Termination Supply RX
RXP
RXN
TXP
TXN
GNDA
TX/RX GND
AVCCAUXTX
2.5V TX
VTTX
Termination Supply TX
22
SERDES_10B
FALSE
TRUE
MULTI-GIGABIT TRANSCEIVER CORE
Power Down
Comma
Detect
Deserializer
Realign
Clock
Manager
Serializer Output
Polarity
Figure 1-1: RocketIO Transceiver Block Diagram
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Chapter 1: RocketIO Transceiver Overview
Serial Baud Rate
1.0 Gb/s – 3.125 Gb/s
600 Mb/s – 1.0 Gb/s
CRC
Check
RX
Elastic
Buffer
8B/10B
Decoder
Channel Bonding
and
Clock Correction
TX 8B/10B
CRC
Encoder
FIFO
RocketIO™ Transceiver User Guide
FPGA FABRIC
POWERDOWN
RXRECCLK
RXPOLARITY
RXREALIGN
RXCOMMADET
ENPCOMMAALIGN
ENMCOMMAALIGN
RXCHECKINGCRC
RXCRCERR
RXDATA[15:0]
RXDATA[31:16]
RXNOTINTABLE[3:0]
RXDISPERR[3:0]
RXCHARISK[3:0]
RXCHARISCOMMA[3:0]
RXRUNDISP[3:0]
RXBUFSTATUS[1:0]
ENCHANSYNC
CHBONDDONE
CHBONDI[3:0]
CHBONDO[3:0]
RXLOSSOFSYNC
RXCLKCORCNT
TXBUFERR
TXFORCECRCERR
TXDATA[15:0]
TXDATA[31:16]
TXBYPASS8B10B[3:0]
TXCHARISK[3:0]
TXCHARDISPMODE[3:0]
TXCHARDISPVAL[3:0]
TXKERR[3:0]
TXRUNDISP[3:0]
TXPOLARITY
TXINHIBIT
LOOPBACK[1:0]
TXRESET
RXRESET
REFCLK
REFCLK2
REFCLKSEL
BREFCLK
BREFCLK2
RXUSRCLK
RXUSRCLK2
TXUSRCLK
TXUSRCLK2
DS083-2_04_090402
UG024 (v2.3.2) June 24, 2004