Rocketio Transceivers - Xilinx RocketIO User Manual

Application Notes
intellectual property interface (IPIF) connecting to either the PLB or OPB buses. This design also
provides for a terminal interface using a serial port connection, allowing MGT attribute settings to
be changed through command line entries. Design modules are also included to facilitate bit-error
rate tests (BERT) and pseudo-random binary sequence (PRBS) diagnostics.
XAPP669: PPC405 PPE Reference System Using Virtex-II Pro

RocketIO Transceivers

The PPC405 Packet Processing Engine (PPE) Reference System using Virtex-II Pro™ RocketIO™
transceivers addresses the need in the digital communications market for high speed data transfer.
Serial protocols can be controlled by complex logic, but are more simply handled by a
microprocessor—in this case, the IBM® PowerPC® 405 (PPC405) processors embedded in the
Virtex-II Pro™ FPGA. This reference system is an example of a high-speed serial-link packet
processing engine implemented in Virtex-II Pro FPGAs. The Embedded Development Kit (EDK) is
used exclusively in the design and implementation of both hardware and software in this reference
system. This reference design has been verified on the Memec Design Virtex-II Pro P4
Development Board. Instructions are included to allow the reader to reproduce the design on this
board.
XAPP670: Minimizing Receiver Elastic Buffer Delay in the Virtex-II Pro
RocketIO Transceiver
This application note describes a design that reduces latency through the receive elastic buffer of the
Virtex-II Pro™ RocketIO™ transceiver. This note is only applicable for designs that do not use the
clock correction or channel bonding features of the RocketIO transceiver. (These operations can still
be done in the fabric, if needed).
XAPP680: HD-SDI Transmitter Using Virtex-II Pro RocketIO Multi-Gigabit
Transceivers
The High-Definition Serial Digital Interface (HD-SDI) standard describes how to transport high
definition (HD) digital video serially over video coax cable. HD-SDI is used to connect HD video
equipment in broadcast studios and video production centers. It is an evolution of the popular SDI
standard that is widely used to transport standard-definition (SD) digital video in the broadcast
industry.
The flexibility of RocketIO™ multi-gigabit transceivers available in the Virtex-II Pro™ family
devices combined with the programmable logic of Virtex-II Pro FPGAs makes it possible to
implement HD-SDI interfaces. Because every Virtex-II Pro FPGA has multiple RocketIO
transceivers, it is possible to integrate multiple HD-SDI interfaces into one Virtex-II Pro device
along with other video processing functions.
This application note describes the electrical specifications for HD-SDI transmitters and the HD-
SDI data format. It also presents several implementation examples and reference designs for an HD-
SDI transmitter implemented using the Virtex-II Pro FPGA.
XAPP681: HD-SDI Receiver Using Virtex-II Pro RocketIO Multi-Gigabit
Transceivers
The High-Definition Serial Digital Interface (HD-SDI) standard describes how to transport high
definition (HD) digital video serially over video coax cable. HD-SDI is used to connect HD video
equipment in broadcast studios and video production centers. It is an evolution of the popular SDI
RocketIO™ Transceiver User Guide
UG024 (v2.3.2) June 24, 2004
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