Processor Pll Filter Recommendation; Topology; Filter Specification; Filter Topology - Intel 810A3 Design Manual

Layout and Routing Guidelines
4.14

Processor PLL Filter Recommendation

4.14.1 Processor PLL Filter Recommendation
®
All Intel
quiet power supplies to minimize jitter.
4.14.2

Topology

The general desired topology is shown in
decoupling capacitors. Excluded from the external circuitry are parasitics associated with each
component.
Figure 4-29. Filter Topology
VCC
4.14.3

Filter Specification

The function of the filter is to protect the PLL from external noise through low-pass attenuation. In
general, the low-pass description forms an adequate description for the filter.
The low-pass specification, with input at VCC
follows:
< 0.2 dB gain in pass band
< 0.5 dB attenuation in pass band (see DC drop in next set of requirements)
> 34 dB attenuation from 1 MHz to 66 MHz
> 28 dB attenuation from 66 MHz to core frequency
The filter specification is graphically shown in
4-28
Celeron™ processors have internal PLL clock generators that are analog and require
C O R E
R L
Figure 4-29. Not shown are parasitic routing and local
PLL1
PLL
C
PLL2
and output measured across the capacitor, is as
CORE
Figure 4-30.
Intel
370-Pin
Socket
VSS = 0V
®
810A3 Chipset Design Guide