Generating An External Reset - Intel 8XC196MC User Manual

8XC196MC, MD, MH USER'S MANUAL
Reset State
Internal
Reset
Signal
RST Instruction
WDT Overflow
IDLPD Invalid Key
† See the datasheet for minimum and maximum R

13.6.1 Generating an External Reset

To reset the device, hold the RESET# pin low for at least one state time after the power supply is
within tolerance and the oscillator has stabilized. When RESET# is first asserted, the device turns
on a pull-down transistor (Q1) for 16 state times. This enables the RESET# signal to function as
the system reset.
The simplest way to reset the device is to insert a capacitor between the RESET# pin and V
shown in Figure 13-10. The device has an internal pull-up resistor (R
RESET# should remain asserted for at least one state time after V
and met the operating conditions specified in the datasheet. A capacitor of 4.7 µF or greater
should provide sufficient reset time, as long as V
13-10
Machine
Trigger
Count Complete
CLR
Q
SET
Figure 13-9. Internal Reset Circuitry
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Clock
Q1
GEN_CON.0
(MH Only)
values.
RST
CC
rises quickly.
CC
Internal
External
V CC
†
R RST
RESET#
~200 Ω
A3086-01
) shown in Figure 13-9.
RST
and XTAL1 have stabilized
, as
SS