Intel 8XC196MC User Manual page 335

8XC196MC, MD, MH USER'S MANUAL
T
XTAL1
ALE
T
LLYV
READY
16 MHz
T
AVYV
RD#
AD15:0
Address Out
(read)
WR#
AD15:0
Address Out
(write)
Figure 15-9. READY Timing Diagram — One Wait State (8XC196MH)
Symbol
T Address Valid to READY Setup
AVYV
Maximum time the external device has to deassert READY after the microcontroller outputs
the address to guarantee that at least one wait state will occur.
†
T READY Hold after CLKOUT Low
CLYX
Minimum time the level of the READY signal must be valid after CLKOUT falls.
T ALE Cycle Time
LHLH
Minimum time between ALE pulses.
†
This specification applies to the 8XC196MC, MD microcontrollers only.
††
This specification applies to the 8XC196MH microcontroller only.
15-20
XTAL1
T + 2T
LHLH
T
LLYX (max)
T
LLYX (min)
8 MHz
T + 2T
RLRH
T + 2T
RLDV XTAL1
T + 2T
AVDV XTAL1
T + 2T
WLWH
T + 2T
RLDV XTAL1
T + 2T
QVWH
Table 15-5. READY Signal Timing Definitions
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XTAL1
XTAL1
Data In
XTAL1
XTAL1
Data Out
Definition
Address
A3167-01