Table of Contents
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This appendix provides reference information for the instruction set of the family of MCS
microcontrollers. It defines the processor status word (PSW) flags, describes each instruction,
shows the relationships between instructions and PSW flags, and shows hexadecimal opcodes,
instruction lengths, and execution times. It includes the following tables.
•
Table A-1 on page A-2 is a map of the opcodes.
•
Table A-2 on page A-4 defines the processor status word (PSW) flags.
•
Table A-3 on page A-5 shows the effect of the PSW flags or a specified register bit on
conditional jump instructions.
•
Table A-4 on page A-5 defines the symbols used in Table A-6.
•
Table A-5 on page A-6 defines the variables used in Table A-6 to represent instruction
operands.
•
Table A-6 beginning on page A-7 lists the instructions alphabetically, describes each of
them, and shows the effect of each instruction on the PSW flags.
•
Table A-7 beginning on page A-41 lists the instruction opcodes, in hexadecimal order,
along with the corresponding instruction mnemonics.
•
Table A-8 on page A-47 lists instruction lengths and opcodes for each applicable addressing
mode.
•
Table A-9 on page A-52 lists instruction execution times, expressed in state times.
The # symbol prefixes an immediate value in immediate addressing mode.
Chapter 3, "Programming Considerations," describes the operand types and
addressing modes.
INSTRUCTION SET REFERENCE
NOTE
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APPENDIX A
®
96
A-1
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