Specifying The Pts Count - Intel 8XC196MC User Manual

The address of the first (lowest) PTSCB byte is stored in the PTS vector table in special-purpose
memory (see "Special-purpose Memory" on page 4-3). Figure 5-13 shows the PTSCB for each
PTS mode. Unused PTSCB bytes can be used as extra RAM.
The PTSCB must be located in the internal register file. The location of the
first byte of the PTSCB must be aligned on a quad-word boundary (an address
evenly divisible by 8).
Single
Transfer
Unused
Unused
PTSDST(H)
PTSDST (L)
PTSSRC (H)
PTSSRC (L)
PTSCON
PTSVECT PTSCOUNT
†
8XC196MC and MD only.
5.6.1

Specifying the PTS Count

The first location of the PTSCB contains an 8-bit value called PTSCOUNT. This value defines
the number of interrupts that will be serviced by the PTS routine. The PTS decrements
PTSCOUNT after each PTS cycle. When PTSCOUNT reaches zero, hardware clears the corre-
sponding PTSSEL bit and sets the PTSSRV bit (Figure 5-6), which requests an end-of-PTS inter-
rupt. The end-of-PTS interrupt service routine should reinitialize the PTSCB, if required, and set
the appropriate PTSSEL bit to re-enable PTS interrupt service.
NOTE
Block A/D Scan
Transfer Mode
Unused Unused
PTSBLOCK Unused
PTSDST (H) PTSPTR2 (H)
PTSDST (L) PTSPTR2 (L)
PTSSRC (H) PTSPTR1 (H)
PTSSRC (L) PTSPTR1 (L)
PTSCON PTSCON
PTSCOUNT PTSCOUNT
Figure 5-13. PTS Control Blocks
Get other manuals https://www.bkmanuals.com
STANDARD AND PTS INTERRUPTS
†
SIO #1
PTSVEC1 (H) Unused
PTSVEC1 (L) SAMPTIME
BAUD (H) DATA (H)
BAUD (L) DATA (L)
EPAREG (H) PTSCON1
EPAREG (L) PORTMASK
PTSCON PORTREG (H)
PTSCOUNT PORTREG (L)
†
SIO #2
5-25