Table of Contents
Advertisement
T2CONTROL
The timer 2 control (T2CONTROL) register determines the clock source, counting direction, and count
rate for timer 2.
7
CE
UD
Bit
Bit
Number
Mnemonic
7
CE
6
UD
5:3
M2:0
2:0
P2:0
Figure 11-9. Timer 2 Control (T2CONTROL) Register
M2
M1
Counter Enable
This bit enables or disables the timer. From reset, the timers are
disabled and not free running.
0 = disables timer
1 = enables timer
Up/Down
This bit determines the timer counting direction, in selected modes (see
mode bits, M2:0).
0 = count down
1 = count up
EPA Clock Direction Mode Bits
These bits determine the timer clocking source and direction source.
M2
M1
M0
Clock Source
0
0
0
F
XTAL
X
0
1
reserved
0
1
0
reserved
0
1
1
reserved
1
0
0
timer 1 overflow
1
1
0
timer 1 overflow
1
1
1
reserved
EPA Clock Prescaler Bits
These bits determine the clock prescaler value.
P2
P1
P0
Prescaler
0
0
0
divide by 1 (disabled)
0
0
1
divide by 2
0
1
0
divide by 4
0
1
1
divide by 8
1
0
0
divide by 16
1
0
1
divide by 32
1
1
0
divide by 64
1
1
1
reserved
†
Resolution at 16 MHz. Use the formula on page 11-6 to calculate the
resolution at other frequencies.
Get other manuals https://www.bkmanuals.com
EVENT PROCESSOR ARRAY (EPA)
Reset State:
M0
P2
Function
Direction Source
/4
UD bit (T2CONTROL.6)
1
—
—
—
UD bit (T2CONTROL.6)
same as timer 1
—
Resolution
250 ns
500 ns
1 µs
2 µs
4 µs
8 µs
16 µs
—
Address:
1F7CH
00H
0
P1
P0
†
11-17
Advertisement
Table of Contents
