Intel 8XC196MC User Manual page 40

ARCHITECTURAL OVERVIEW
Optional
Interrupt
Core
ROM
Controller
Clock and
PTS
Power Mgmt.
I/O EPA PWM WG A/D WDT FG SIO
Note:
The frequency generator is unique to the 8XC196MD.
The serial I/O port is unique to the 8XC196MH.
A2798-02
Figure 2-1. 8XC196M x Block Diagram
Memory Controller
CPU
Register File RALU
Prefetch Queue
Microcode
Engine Slave PC
Register
Address Register
ALU
RAM
Data Register
Master PC
PSW
CPU SFRs
Bus Controller
Registers
A2797-01
Figure 2-2. Block Diagram of the Core
2-3
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