Intel 8XC196MC User Manual page 529

8XC196MC, MD, MH USER'S MANUAL
SPx_STATUS
SP x _STATUS
x = 0–1 (8XC196MH)
The serial port status (SP x _STATUS) register contains bits that indicate the status of serial port x .
7
8XC196MH RPE/RB8
Bit Bit
Number Mnemonic
7 RPE/RB8
6 RI
5 TI
4 FE
3 TXE
2 OE
1:0 —
C-52
RI TI FE
Received Parity Error/Received Bit 8
RPE is set if parity is disabled (SP x _CON.2 = 0) and the ninth data bit
received is high.
RB8 is set if parity is enabled (SP x _CON.2 = 1) and a parity error occurred.
Reading SP x _STATUS clears this bit.
Receive Interrupt
This bit is set when the last data bit is sampled. Reading SP x _STATUS
clears this bit.
Transmit Interrupt
This bit is set at the beginning of the stop bit transmission. Reading
SP x _STATUS clears this bit.
Framing Error
This bit is set if a stop bit is not found within the appropriate period of time.
Reading SP x _STATUS clears this bit.
SBUF x _TX Empty
This bit is set if the transmit buffer is empty and ready to accept up to two
bytes. It is cleared when a byte is written to SBUF x _TX.
Overrun Error
This bit is set if data in the receive shift register is loaded into SBUF x _RX
before the previous bit is read. Reading SP x _STATUS clears this bit.
Reserved; for compatibility with future devices, write zeros to these bits.
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Address:
Reset State:
TXE OE
Function
1F81H, 1F89H
00H
0
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