Intel 8XC196MC User Manual page 507

8XC196MC, MD, MH USER'S MANUAL
Px_DIR
P x _DIR
x = 2, 5 (8XC196MC)
x = 2, 5, 7 (8XC196MD)
x = 1, 2, 5 (8XC196MH)
Each pin of port x can operate in any of the standard I/O modes of operation: complementary output,
open-drain output, or high-impedance input. The port x I/O direction (P x _DIR) register determines the
I/O direction for each port x pin. The register settings for an open-drain output or a high-impedance
input are identical. An open-drain output configuration requires an external pull-up. A high-impedance
input configuration requires that the corresponding bit in P x _REG be set.
7
x = 1 (MH)
7
x = 2, 5 (M x )
7
x = 7 (MD)
Bit Bit
Number Mnemonic
†
7:0 PIN7:0
†
The bits shown as dashes (—) are reserved; for compatibility with future devices, write ones to these
bits.
P1_DIR (8XC196MH)
P2_DIR (8XC196M x )
P5_DIR (8XC196M x )
P7_DIR (8XC196MD)
C-30
— — —
PIN7 PIN6 PIN5
PIN7 PIN6 PIN5
Port x Pin y Direction
This bit selects the P x . y direction:
0 = complementary output (output only)
1 = input or open-drain output (input, output, or bidirectional open-
drain outputs require external pull-ups.
Table C-6. P x _DIR Addresses and Reset Values
Register
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— PIN3 PIN2
PIN4 PIN3 PIN2
PIN4 PIN3 PIN2
Function
Address Reset Value
1F9BH FFH
1FD2H FFH
1FF3H FFH
1FD3H FFH
Address: Table C-6
Reset State:
0
PIN1 PIN0
0
PIN1 PIN0
0
PIN1 PIN0