Intel 8XC196MC User Manual page 436

Table A-8 lists instructions along with their lengths and opcodes for each applicable addressing
mode. A dash (—) in any column indicates "not applicable."
Table A-8. Instruction Lengths and Hexadecimal Opcodes
Mnemonic
Length
ADD (2 ops)
ADD (3 ops)
ADDB (2 ops)
ADDB (3 ops)
ADDC
ADDCB
CLR
CLRB
CMP
CMPB
CMPL
DEC
DECB
EXT
EXTB
INC
INCB
SUB (2 ops)
SUB (3 ops)
SUBB (2 ops)
SUBB (3 ops)
SUBC
SUBCB
NOTES:
1. For indexed instructions, the first column lists instruction lengths as S / L , where S is the short-indexed
instruction length and L is the long-indexed instruction length.
2. For the SCALL and SJMP instructions, the three least-significant bits of the opcode are concatenated
with the eight bits to form an 11-bit, two's complement offset.
Arithmetic (Group I)
Direct Immediate
Opcode Length
3 64 4
4 44 5
3 74 3
4 54 4
3 A4 4
3 B4 3
2 01 —
2 11 —
3 88 4
3 98 3
3 C5 —
2 05 —
2 15 —
2 06 —
2 16 —
2 07 —
2 17 —
3 68 4
4 48 5
3 78 3
4 58 4
3 A8 4
3 B8 3
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INSTRUCTION SET REFERENCE
Indirect
Opcode Length Opcode
65 3 66
45 4 46
75 3 76
55 4 56
A5 3 A6
B5 3 B6
— — —
— — —
89 3 8A
99 3 9A
— — —
— — —
— — —
— — —
— — —
— — —
— — —
69 3 6A
49 4 4A
79 3 7A
59 4 5A
A9 3 AA
B9 3 BA
Indexed
(Note 1)
Length
Opcode
S/L
4/5 67
5/6 47
4/5 77
5/6 57
4/5 A7
4/5 B7
— —
— —
4/5 8B
4/5 9B
— —
— —
— —
— —
— —
— —
— —
4/5 6B
5/6 4B
4/5 7B
5/6 5B
4/5 AB
4/5 BB
A-47