Intel 8XC196MC User Manual page 497

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8XC196MC, MD, MH USER'S MANUAL
EPAx_CON
EPA x _CON (Continued)
x = 0–1 (8XC196MH)
x = 0–3 (8XC196MC)
x = 0–5 (8XC196MD)
The EPA control (EPA x _CON) registers control the functions of their assigned capture/compare
channels.
7
x = 0, 2, 4
TB
7
x = 1, 3, 5
TB
Bit
Bit
Number
Mnemonic
0
ON/RT
Table C-4. EPA x _CON Addresses and Reset Values
EPA0_CON (8XC196M x )
EPA1_CON (8XC196M x )
EPA2_CON (8XC196MC, MD)
EPA3_CON (8XC196MC, MD)
EPA4_CON (8XC196MD)
EPA5_CON (8XC196MD)
C-20
CE
M1
CE
M1
Overwrite New/Reset Timer
The ON/RT bit functions as overwrite new in capture mode and reset
timer in compare mode.
In Capture Mode (ON):
An overrun error is generated when an input capture occurs while the
event-time register (EPA x _TIME) and its buffer are both full. When an
overrun occurs, the ON bit determines whether old data is overwritten or
new data is ignored:
0 = ignores new data
1 = overwrites old data in the buffer
In Compare Mode (RT):
0 = disables the reset function
1 = resets the ROT-selected timer
Register
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Reset State:
M0
RE
WGR
M0
RE
AD
Function
Address
Reset Value
1F40H
1F44H
1F48H
1F4CH
1F50H
1F54H
Address:
Table C-4
0
ROT
ON/RT
0
ROT
ON/RT
00H
00H
00H
00H
00H
00H

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