Table of Contents
Advertisement
8XC196MC, MD, MH USER'S MANUAL
SJMP instruction, A-2, A-36, A-41, A-47, A-49,
A-55
SKIP instruction, A-2, A-36, A-41, A-51, A-57
Slave programming mode, 16-15–16-24
address/command decoder routine, 16-19,
16-20
algorithm, 16-19–16-24
circuit, 16-16
dump-word routine, 16-19, 16-23
entering, 16-19
program-word routine, 16-19, 16-21
security key programming, 16-15
timings, 16-22, 16-24
Software
addressing modes, 3-9
conventions, 3-9–3-11
device reset, 13-12
interrupt service routines, 5-19
linking subroutines, 3-10
protection, 3-11
trap interrupt, 5-4, 5-6, 5-9
SP_STATUS, 7-15
SPE bit, 7-3
Special instructions, A-51, A-57
Special operating modes
SFRs, 14-2
Special-purpose memory, 4-2
SPx bit, 7-4
SPx_BAUD, C-70
SPx_CON, C-70
SPx_STATUS, C-70
ST instruction, A-2, A-37, A-45, A-49, A-55
Stack instructions, A-49, A-54
Stack pointer, 4-10, C-49
and subroutine call, 4-10
initializing, 4-11
Standard bus-control mode
decoding WRL# and WRH#, 15-22
example system, 15-23
signals, 15-22
State time, defined, 2-8
STB instruction, A-2, A-37, A-45, A-49, A-55
Sticky bit (ST) flag, 3-4, A-4, A-5, A-21, A-22
SUB instruction, A-3, A-37, A-42, A-47, A-52
SUBB instruction, A-3, A-38, A-42, A-43, A-47,
A-52
SUBC instruction, A-3, A-38, A-44, A-47, A-52
SUBCB instruction, A-3, A-38, A-44, A-47, A-52
Index-12
Get other manuals https://www.bkmanuals.com
Subroutines
linking, 3-10
nested, 4-10
Symbols
signal status, B-23
System bus timing, 15-32
T
T1CLK, 11-2, B-21
T1CONTROL, C-70
T1DIR, 11-2, B-21
T1RELOAD, C-70
T2CONTROL, C-70
Technical support, 1-11
Terminology, 1-3
TIJMP instruction, A-2, A-39, A-45, A-49, A-55
Timer 1 control register, 11-16, C-53
Timer 1 reload register, C-54
Timer 2 control register, 11-17, C-55
Timer x register, C-56
Timer, watchdog‚ See watchdog timer
Timer/counters, 2-10
and PWM, 11-13, 11-14
cascading, 11-7
count rate, 11-6
programming, 11-15
quadrature clocking, 11-7
resolution, 11-6
signals, 11-2
See also EPA
TIMER1, C-70
TIMER2, C-70
Timing
dump-word routine, 16-24
instruction execution, A-52–A-53
internal, 2-7, 2-8
interrupt latency, 5-9–5-12, 5-30
program-word routine, 16-22
PTS cycles, 5-12
SIO port mode 0, 7-6, 7-7
SIO port mode 1, 7-8
SIO port mode 2, 7-9
SIO port mode 3, 7-9
slave programming routines, 16-22, 16-24
Timing definitions
BUSWIDTH, 15-13
READY, 15-20
Advertisement
Table of Contents
