AD_TEST
The A/D test (AD_TEST) register specifies adjustments for DC offset errors.
7
—
—
Bit
Bit
Number
Mnemonic
7:5
—
4
OFF1
3
—
2
OFF0
1:0
—
—
OFF1
Reserved; for compatibility with future devices, write zeros to these bits.
Offset
This bit , along with OFF0 (bit 2) allows you to set the zero offset point.
OFF1 OFF0
0
0
no adjustment
0
1
add 2.5 mV
1
0
subtract 2.5 mV
1
1
subtract 5.0 mV
Reserved; for compatibility with future devices, write zero to this bit.
See bit 4 (OFF1).
Reserved; for compatibility with future devices, write zeros to these bits.
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Address:
Reset State (MC, MD):
Reset State (MH):
—
OFF0
Function
REGISTERS
AD_TEST
1FAEH
C0H
88H
0
—
—
C-9