Priorities Of Maskable Interrupts - NEC V850/SB1 User Manual

32-bit single-chip microcontroller
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5.3.3 Priorities of maskable interrupts

The V850/SB1 and V850/SB2 provide multiple interrupt servicing in which an interrupt is acknowledged while
another interrupt is being serviced. Multiple interrupts can be controlled by priority levels.
There are two types of priority level control: control based on the default priority levels, and control based on the
programmable priority levels which are specified by the interrupt priority level specification bit (xxPRn). When two or
more interrupts having the same priority level specified by xxPRn are generated at the same time, interrupts are
serviced in order depending on the priority level allocated to each interrupt request type (default priority level) before-
hand. For more information, refer to Table 5-1. Programmable priority control customizes interrupt requests into
eight levels by setting the priority level specification flag.
Note that when an interrupt request is acknowledged, the ID flag of the PSW is automatically set to ''1''. There-
fore, when multiple interrupts are to be used, clear the ID flag to ''0'' beforehand (for example, by placing the EI in-
struction into the interrupt service program) to set the interrupt enabled mode.
Remark xx: Identification name of each peripheral unit (refer to Table 5-2)
n: Number of each peripheral unit (refer to Table 5-2)
158
CHAPTER 5
INTERRUPT/EXCEPTION PROCESSING FUNCTION
User's Manual U13850EJ6V0UD

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