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18.6
Module Standby Function
18.6.1
Module Standby Timing
The module standby function can halt several of the on-chip supporting modules (SCI1, SCI0, 16-
bit timer, 8-bit timer, and A/D converter) independently in the power-down state. This standby
function is controlled by bits MSTPH2 to MSTPH0 in MSTCRH and bits MSTPL7 to MSTPL0 in
MSTCRL. When one of these bits is set to 1, the corresponding on-chip supporting module is
placed in standby and halts at the beginning of the next bus cycle after the MSTCR write cycle.
18.6.2
Read/Write in Module Standby
When an on-chip supporting module is in module standby, read/write access to its registers is
disabled. Read access always results in H'FF data. Write access is ignored.
18.6.3
Usage Notes
When using the module standby function, note the following points.
On-chip Supporting Module Interrupts: Before setting a module standby bit, first disable
interrupts by that module. When an on-chip supporting module is placed in standby by the
module standby function, its registers are initialized, including registers with interrupt request
flags.
Pin States: Pins used by an on-chip supporting module lose their module functions when the
module is placed in module standby. What happens after that depends on the particular pin. For
details, see section 7, I/O Ports. Pins that change from the input to the output state require special
care. For example, if SCI1 is placed in module standby, the receive data pin loses its receive data
function and becomes a port pin. If its port DDR bit is set to 1, the pin becomes a data output pin,
and its output may collide with external SCI transmit data. Data collision should be prevented by
clearing the port DDR bit to 0 or taking other appropriate action.
Register Resetting: When an on-chip supporting module is halted by the module standby
function, all its registers are initialized. To restart the module, after its MSTCR bit is cleared to 0,
its registers must be set up again. It is not possible to write to the registers while the MSTCR bit is
set to 1.
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