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5.1 Initialization Method
5.1.1 Initialization
This section describes initial settings necessary for operating the UART interface.
(1) Baud rate settings and enabling 64-byte FIFO mode
Set bit 7 (DLAB) of the LCR register to 1 and specify a baud rate in the DLM and DLL registers.
After the above settings, LCR [7] is to set it in = 0, and generation of 16x clock is begun.
(2) FIFO mode settings
Specify whether to enable FIFO by using bit 0 of the FCR register.
Select a DMA mode by using bit 3 of the FCR register.
Select the 16- or 64-byte FIFO mode by using bit 5 of the FCR register.
Select the trigger level of the receive FIFO by using bits 7 and 6 of the FCR register. (This setting is not
required for the non-FIFO mode.)
(3) Serial interface settings
Specify the length of frame data in bits by using bits 1 and 0 (WLS) of the LCR register.
Specify the number of stop bits by using bit 2 of the LCR register.
Select no parity, even parity, odd parity, or stick parity by using bits 5 to 3 of the LCR register.
(4) Modem interface settings
Set up flow control by using bits 5 and 1 of the MCR register.
When auto-flow control is not used, set bit 1 of the MCR register to 1 to assert the RTSZ output.
Next, set up the IER and HCR0 registers to enable the interrupt and DMA functions.
Set bits 3 and 2 of the IER register to 1
Enable the receiver line interrupt.
Enable the modem status interrupt. (Read the MSR register before enabling this interrupt or the interrupt
might be issued immediately.)
When data is transferred with an interrupt
Bit 6 of HCR0 = 0 or 1
Bits 1 and 0 of IER = 1
When data is transferred by DMA
Bit 6 of HCR0 = 0 or 1
Bits 5 to 2 of HCR0
Bits 1 and 0 of HCR0 = 1
CHAPTER 5 USAGE
Set the auto-RTS mode.
Enable the transmit buffer empty interrupt and received data available interrupt.
Set the auto-RTS mode.
Specify the settings for the DMA mode.
Enable the transmission/reception DMA request.
User's Manual S19262EJ3V0UM
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