Fujitsu M2488 Product Manual page 439

M2488 PRODUCT GUIDE
Table F-14. Routine 12 - EDRC Address Bus Diagnostic Error Codes (Continued)
ROUTINE TEST
0x01 SDDP-R20 buffer flush signal
0x12
test, mode 14h
0x12 0x02 SDDP-R20 testing 64k sgc-i-
mem, mode 14h
April 1997
ERROR
TITLE
CODE
0x03
0x04
0x05
0x06
0x07
0x01
0x02
0x03
0x04
0x05
0x06
CG00000-011503 REV. A
DIAGNOSTIC TESTS AND ERROR CODES
DESCRIPTION
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
SCSI_REQ, SCSI_BSY, xfer_phase.
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
~SCSI_REQ, SCSI_ACK, SCSI_BSY,
xfer_phase.
host data transfer end of transfer was received
when not expected, check to see if flush is tied
high to some other signal.
host data transfer end of transfer was not
received when expected, check to see if flush
is tied low to some other signal.
All the data expected to be transferred out of
the SPC data fifo was not transferred to the
SDDP.
after a write diag operation was initialized in
the spc chip, the SPC-status register did not
have one of the following:
SPC_data_trans_rdy, SPC_busy, or
SPC_data_reg_empty.
A non SUCCESS status was returned from
the function call rm_request_wrtbuffer.
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
SCSI_REQ, SCSI_BSY, xfer_phase.
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
~SCSI_REQ, SCSI_ACK, SCSI_BSY,
xfer_phase.
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
SCSI_REQ, SCSI_BSY, xfer_phase.
when transferring data from the SPC send
buffer to the SPC data fifo, the SPC-ssig regis-
ter did not have the expected bits set:
~SCSI_REQ, SCSI_ACK, SCSI_BSY,
xfer_phase.
F-39