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PA
n
WPAD:
Write to PADDR
WPA:
Write to port A
RPA:
Read port A
n = 2, 3
Figure C.6 (b) Port A Block Diagram (Pins PA
604
Hardware standby
Reset
R
Q
D
PA DDR
n
C
WPAD
Reset
R
Q
D
PA DR
n
C
RPA
2
TPC
TPC
output
enable
Next
data
WPA
Output
trigger
16-bit timer
Output
enable
Compare
match
output
Input
capture
Counter
clock
input
8-bit timer
Counter
clock input
and PA
)
3
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