12.1.4
Register Configuration
The SCI has internal registers as listed in table 12.2. These registers select asynchronous or
synchronous mode, specify the data format and bit rate, control the transmitter and receiver
sections, and specify switching between the serial communication interface and smart card
interface.
Table 12.2 SCI Registers
Channel
Address*
0
H'FFFB0
H'FFFB1
H'FFFB2
H'FFFB3
H'FFFB4
H'FFFB5
H'FFFB6
1
H'FFFB8
H'FFFB9
H'FFFBA
H'FFFBB
H'FFFBC
H'FFFBD
H'FFFBE
Notes: 1. Indicates the lower 20 bits of the address in advanced mode.
2. Only 0 can be written, to clear flags.
1
Name
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
Smart card mode register
Serial mode register
Bit rate register
Serial control register
Transmit data register
Serial status register
Receive data register
Smart card mode register
Abbreviation
R/W
SMR
R/W
BRR
R/W
SCR
R/W
TDR
R/W
SSR
R/(W)*
RDR
R
SCMR
R/W
SMR
R/W
BRR
R/W
SCR
R/W
TDR
R/W
SSR
R/(W)*
RDR
R
SCMR
R/W
Initial Value
H'00
H'FF
H'00
H'FF
2
H'84
H'00
H'F2
H'00
H'FF
H'00
H'FF
2
H'84
H'00
H'F2
315