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7.5.2
Register Descriptions
Table 7.7 summarizes the registers of port 8.
Table 7.7
Port 8 Registers
Address*
Name
H'EE007
Port 8 data direction register
H'FFFD7
Port 8 data register
Note: * Lower 20 bits of the address in advanced mode.
Port 8 Data Direction Register (P8DDR): P8DDR is an 8-bit write-only register that can select
input or output for each pin in port 8.
Bits 7 to 5 are reserved. They are fixed at 1, and cannot be modified.
Bit
Initial value
Read/Write
When bits in P8DDR bit are set to 1, P8
P8DDR are cleared to 0, the corresponding pins become input ports.
In the H8/3008, following a reset P8
P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P8DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
P8DDR retains its previous setting. Therefore, if a transition is made to software standby mode
while port 8 is functioning as an input/output port and a P8DDR bit is set to 1, the corresponding
pin maintains its output state.
Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores output data
for port 8. When port 8 functions as an output port, the value of this register is output. When a bit
in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is returned. When a
bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin logic level is read.
150
7
6
—
—
1
1
—
—
Reserved bits
4
functions as the CS
4
Abbreviation
P8DDR
P8DR
5
4
—
P8 DDR
P8 DDR
4
3
1
1
—
W
Port 8 data direction 4 to 0
These bits select input or
output for port 8 pins
become CS
to P8
1
0
output, while CS
0
R/W
Initial Value
W
H'F0
R/W
H'E0
3
2
P8 DDR
P8 DDR
2
0
0
W
W
to CS
output pins. When bits in
3
to CS
1
1
0
P8 DDR
1
0
0
0
W
W
are input ports.
3
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