Pin Configuration; Register Configuration; Register Descriptions; System Control Register (Syscr) - Hitachi H8/3008 Hardware Manual

5.1.3

Pin Configuration

Table 5.1 lists the interrupt pins.
Table 5.1 Interrupt Pins
Name
Nonmaskable interrupt
External interrupt request 5 to 0
5.1.4

Register Configuration

Table 5.2 lists the registers of the interrupt controller.
Table 5.2 Interrupt Controller Registers
1
Address* Name
H'EE012 System control register
H'EE014 IRQ sense control register
H'EE015 IRQ enable register
H'EE016 IRQ status register
H'EE018 Interrupt priority register A
H'EE019 Interrupt priority register B
Notes: 1. Lower 20 bits of the address in advanced mode.
2. Only 0 can be written, to clear flags.
5.2

Register Descriptions

5.2.1

System Control Register (SYSCR)

SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
Abbreviation I/O
NMI Input Nonmaskable interrupt, rising edge or
IRQ to IRQ
Input Maskable interrupts, falling edge or level
5 0
Abbreviation
SYSCR
ISCR
IER
ISR
IPRA
IPRB
Function
falling edge selectable
sensing selectable
R/W
R/W
R/W
R/W
2
R/(W)*
R/W
R/W
Initial Value
H'09
H'00
H'00
H'00
H'00
H'00
75