Table of Contents
Advertisement
• Output compare output timing
The compare match signal is generated in the last state in which 16TCNT and the general
register match (when 16TCNT changes from the matching value to the next value). When the
compare match signal is generated, the output value selected in TIOR is output at the output
compare pin (TIOCA or TIOCB). When 16TCNT matches a general register, the compare
match signal is not generated until the next counter clock pulse.
Figure 8.20 shows the output compare timing.
φ
16TCNT input
clock
16TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Input Capture Function: The 16TCNT value can be transferred to a general register when an
input edge is detected at an input capture input/output compare pin (TIOCA or TIOCB). Rising-
edge, falling-edge, or both-edge detection can be selected. The input capture function can be used
to measure pulse width or period.
208
N
N
Figure 8.20 Output Compare Output Timing
N + 1
Advertisement
Table of Contents
