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PB
n
WPBD:
Write to PBDDR
WPB:
Write to port B
RPB:
Read port B
SSOE:
Software standby output port enable
n = 1, 3
Figure C.7 (b) Port B Block Diagram (Pins PB
Software standby
SSOE
Hardware
standby
Reset
Q
PB
WPBD
Bus released
Reset
Mode
1 to 5
Q
PB
R
D
DDR
n
C
R
D
DR
n
C
WPB
RPB
Bus controller
CS6
CS4 output
CS output enable
TPC
TPC output enable
Next data
Output trigger
8-bit timer
Output enable
Compare match output
TMO2
TMO3 input
and PB
)
1
3
607
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