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BRCR—Bus Release Control Register
Bit
Modes
Initial value
1 and 2
Read/Write
Modes
Initial value
3 and 4
Read/Write
ISCR—IRQ Sense Control Register
7
Bit
Initial value
0
Read/Write
R/W
7
6
A23E
A22E
A21E
1
1
1
1
R/W
R/W
R/W
Address 23 to 20 enable
0
Address output
1
Other input/output
6
5
IRQ5SC
IRQ4SC
0
0
R/W
R/W
IRQ
to IRQ
sense control
5
0
Interrupts are requested when IRQ
0
Interrupts are requested by falling-edge input at IRQ
1
H'EE013
5
4
3
A20E
1
1
1
1
0
1
H'EE014
4
3
IRQ3SC
IRQ2SC
0
0
R/W
R/W
R/W
Bus controller
2
1
1
1
1
1
Bus release enable
The bus cannot be
released to an
0
external device
The bus can be
1
released to an
external device
Interrupt Controller
2
1
0
IRQ1SC
IRQ0SC
0
0
0
R/W
R/W
to IRQ
are low
5
0
to IRQ
5
0
BRLE
0
R/W
0
R/W
0
529
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