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Pin
Name
Mode
PA
1, 2
7
3, 4
PB
to PB
—
3
0
PB
to PB
—
7
4
Legend:
H:
High
L:
Low
T:
High-impedance state
keep: Input pins are in the high-impedance state; output pins maintain their previous state.
DDR:
Data direction register
Notes: 1. When A23E, A22E, A21E = 0 in BRCR (bus release control register).
2. When A23E, A22E, A21E = 1 in BRCR (bus release control register).
3. When CS7E, CS6E, CS5E, CS4E = 1 in CSCR (chip select control register).
4. When CS7E, CS6E, CS5E, CS4E = 0 in CSCR (chip select control register).
614
Hardware
Standby
Software
Reset
Mode
Standby Mode
Keep
T
T
(SSOE = 0)
L
T
T
(SSOE = 1)
Keep
(CS output)*
T
T
(SSOE = 0)
T
(SSOE = 1)
H
(Otherwise)*
Keep
T
T
Keep
Bus-
Released Mode
Keep
T
3
(CS output)*
T
(Otherwise)*
Keep
4
Keep
Program
Execution Mode
I/O port
A
20
3
3
(CS output)*
CS
to CS
7
4
4
4
(Otherwise)*
I/O port
I/O port
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