Register Configuration; Register Descriptions; A/D Data Registers A To D (Addra To Addrd) - Hitachi H8/3008 Hardware Manual

14.1.4

Register Configuration

Table 14.2 summarizes the A/D converter's registers.
Table 14.2 A/D Converter Registers
1
Address* Name
H'FFFE0 A/D data register A H
H'FFFE1 A/D data register A L
H'FFFE2 A/D data register B H
H'FFFE3 A/D data register B L
H'FFFE4 A/D data register C H
H'FFFE5 A/D data register C L
H'FFFE6 A/D data register D H
H'FFFE7 A/D data register D L
H'FFFE8 A/D control/status register
H'FFFE9 A/D control register
Notes: 1. Lower 20 bits of the address in advanced mode.
2. Only 0 can be written in bit 7, to clear the flag.
14.2

Register Descriptions

14.2.1

A/D Data Registers A to D (ADDRA to ADDRD)

Bit 15
ADDRn AD9
Initial value 0
R
Read/Write
(n = A to D)
The four A/D data registers (ADDRA to ADDRD) are 16-bit read-only registers that store the
results of A/D conversion.
An A/D conversion produces 10-bit data, which is transferred for storage into the A/D data
register corresponding to the selected channel. The upper 8 bits of the result are stored in the upper
byte of the A/D data register. The lower 2 bits are stored in the lower byte. Bits 5 to 0 of an A/D
400
14 13 12 11
AD8 AD7 AD6 AD5
0 0 0 0
R R R R
A/D conversion data
10-bit data giving an
A/D conversion result
Abbreviation
ADDRAH
ADDRAL
ADDRBH
ADDRBL
ADDRCH
ADDRCL
ADDRDH
ADDRDL
ADCSR
ADCR
10 9 8 7
AD4 AD3 AD2 AD1
0 0 0 0
R R R R
R/W
R
R
R
R
R
R
R
R
2
R/(W)*
R/W
6 5 4 3
AD0 — — —
0 0 0 0
R R R R
Reserved bits
Initial Value
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'7E
2 1 0
— — —
0 0 0
R R R