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Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores output data
for pins port B. When port B functions as an output port, the value of this register is output. When
a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned.
When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin logic level is read.
Bit
Initial value
Read/Write
R/W
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
168
7
6
PB
PB
7
6
0
0
R/W
R/W
5
4
PB
PB
5
4
0
0
R/W
R/W
Port B data 7 to 0
These bits store data for port B pins
3
2
PB
PB
3
2
0
0
R/W
R/W
1
0
PB
PB
1
0
0
0
R/W
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