Operation; Overview - Hitachi H8/3008 Hardware Manual

16-bit microcomputer
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10.3

Operation

10.3.1

Overview

When corresponding bits in PADDR or PBDDR and NDERA or NDERB are set to 1, TPC output
is enabled. The TPC output initially consists of the corresponding PADR or PBDR contents.
When a compare-match event selected in TPCR occurs, the corresponding NDRA or NDRB bit
contents are transferred to PADR or PBDR to update the output values.
Figure 10.2 illustrates the TPC output operation. Table 10.3 summarizes the TPC operating
conditions.
TPC output pin
Table 10.3 TPC Operating Conditions
NDER
DDR
0
0
1
1
0
1
Sequential output of up to 16-bit patterns is possible by writing new output data to NDRA and
NDRB before the next compare match. For information on non-overlapping operation, see
section 10.3.4, Non-Overlapping TPC Output.
DDR
NDER
Q
Q
Figure 10.2 TPC Output Operation
Pin Function
Generic input port
Generic output port
Generic input port (but the DR bit is a read-only bit, and when compare
match occurs, the NDR bit value is transferred to the DR bit)
TPC pulse output
Q
Output trigger signal
C
DR
D
Q
NDR
D
Internal
data bus
289

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