Motherboard Placement Consideration; Tpm 1.1/Ep80579 Block Diagram; Tpm 1.2/Ep80579 Block Diagram - Intel EP80579 Manual

Figure 126. TPM 1.1/EP80579 Block Diagram
Figure 127. TPM 1.2/EP80579 Block Diagram
EP80579
SUS_STAT#
14.3.3

Motherboard Placement Consideration

Optimum routing can typically be achieved by placing the TPM close to the EP80579 or
other LPC peripherals (e.g., Firmware Hub, Super I/O).
The TPM is a security device that must be shielded as much as possible from physical
access. In high-security implementations, there are a number of mechanisms that can
be used to detect or prevent physical system intrusion, but such mechanisms are
beyond the scope of this design guide. However, convenience of physical access to the
TPM can be minimized by placing the TPM behind the memory DIMMs. In an ATX or
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Intel EP80579 Integrated Processor Product Line
Platform Design Guide
190
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Intel EP80579 Integrated Processor Product Line—Low Pin Count (LPC) Interface
E P 80579
L A D [0 ]
L A D [1 ]
L A D [2 ]
L A D [3 ]
S U S_ S T A T#
LF R A M E #
S E R IR Q
P LT R S T #
LAD0
LAD1
LAD2
LAD3
LFRAME#
SERIRQ
PLTRST#
SMBDATA
SMBCLK
T P M 1.1
LA D 0
LC L K
LA D 1
LA D 2
LA D 3
L P C P D #
LF R A M E #
S E R IR Q
LR E S E T#
TPM 1.2
LAD0
LCLK
LAD1
XTALI
LAD2
LAD3
XTALO
LPCPD#
LFRAME#
SERIRQ
LRESET#
SMDATA
SMCLK
C lo ck C h ip
C LK 33
Clock Chip
CLK33
32 KHz
Crystal
May 2010
Order Number: 320068-005US