Mounting; Development Board Summary - Intel EP80579 Manual

Table 7.

Development Board Summary

Board Factor
Material
Impedance
requirements
Etch-Etch Spacing
Finished Via Size
Finish
Soldermask Type
Fabrication
Component
Technology
Note:
1. See the appropriate section in this guide for all possible impedance information. This table is only a
general summary.
3.3

Mounting

The Development Board uses non-plated holes for mounting the board. The mounting
holes have a spoked ground ring on the top and bottom of the board for all true
mounting holes. The hole size for a true mounting hole is 0.125" and the ground ring
outer diameter is 0.40". The hole placement follows Extended ATX wherever possible.
The Development Board also uses phantom mounting holes. Phantom mounting holes
are 0.4" etch keep-out circles on the bottom of the board. The phantom holes can be
used for extra board support by aligning a stand off in the center of the phantom hole.
®
Intel EP80579 Integrated Processor Product Line
Platform Design Guide
36
®
Intel EP80579 Integrated Processor Product Line—Baseboard Requirements
• Standard FR4 Tg 170 Epoxy
• 370HR used for lead free
• DDR2:
• Varies depending on the layer, the signal, and the topology used.
• PCI Express*:
1
• 90 Ω ±10% differential with 4.5-mils trace width for stripline layers
• 90 Ω ±10% differential with 4.75-mils trace width for microstrip layers
• See the routing guidelines for each interface for this information.
• Minimum via size is 10 mils finished hole/21 mils pad/31 mils anti pad
• Soldermask over bare copper (SMOBC) and immersion gold
• SM-840 minimum web 4 mils
• Edge Routed
• Through hole/SMT
• QFP, BGA, and discrete 0603, 0805 Front side (Top layer)
• Discrete 0603, 0805,7343, 1210 Back side (Bottom layer)
Recommendation
Order Number: 320068-005US
May 2010