27.0
Layout Checklist
The layout checklist provides design considerations that should be reviewed prior to
completing the layout and routing of EP80579-based platform designs. See the
individual peripheral interface chapters in this document for more detailed routing
guidelines for the platform board.
27.1
Functional Signal Definitions
Table 96
provides the legend for interpreting the IO Type field that appears throughout
the tables in this section.
Table 96.
Signal Type Definitions
Symbol
#
I
O
I/O
OD
PWR
GND
Reserved
NCn
®
Intel
EP80579 Integrated Processor Product Line
Platform Design Guide
268
®
Intel
EP80579 Integrated Processor Product Line—Layout Checklist
Active low signal
Input pin only
Output pin only
Pin can be either an input or output
Open Drain pin
Power pin
Ground pin
Pin must be connected as described, where n is the reserved pin number
No Connection, where n is the NC pin number
Description
Order Number: 320068-005US
May 2010