Gbe Ethernet Interface - Rmii Mode; Gbe Rgmii Mode Signal Connection Block Diagram - Intel EP80579 Manual

Gigabit Ethernet (GbE) Interface—Intel
The RGMII interface gets Rx clock from the PHY and Tx clock from the MAC. The PHY
receives a 25 MHz reference clock from the board, and the PHY sources the 125 MHz
reference clock to the MAC. The RGMII outputs use 2.5V drivers that are 3.3V-tolerant.
Figure 136
Figure 136. GbE RGMII Mode Signal Connection Block Diagram
GBE I/O
Vcc
19.5.2 GbE Ethernet Interface — RMII Mode
This section describes the GbE interface when the interconnect is designed for a RMII
interface.
In RMII mode, data is transmitted and received (TXDATA and RXDATA) with respect to
the MAC and PHY reference clock inputs, which in 10/100 Base T is 50 MHz.
Figure 137
connections. A 50 MHz external clock sources both the MAC and PHY reference clocks.
®
Intel EP80579 Integrated Processor Product Line
Order Number: 320068-005US
®
EP80579 Integrated Processor Product Line
shows the GbE block diagram with the signal connections in RGMII mode:
GBEn MAC
GBEn_TxCLK
GBEn_TxCTL
GBEn_TxDATA[3:0]
GBEn_RxCLK
GBEn_RxCTL
GBEn_RxDATA[3:0]
MDIO
MDC
EEDO
EECS
EEDI
EESK
GBE_REFCLK
100 ohm
GBE_REFCLK_RMII
shows the GbE signal connections used in RMII mode for 10/100 Base
RGMII Signals
125 / 25 / 2.5 MHz
125 / 25 / 2.5 MHz
VCCSUS25
1.5 Kohm
Serial
EEPROM
25 MHz
Reference Clock
Vcc
2.5V +/- 5%
1000 / 100 / 10 Base PHY
GTX_CLK
TX_EN
TXD[3:0]
RX_CLK
RX_DV
RXD[3:0]
MDIO
MDC
125 MHz Clk
GBE I/O
Vcc
PHY_REFCLK
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