Leaving The Gmch Dvob Or Dvoc Port Unconnected; Miscellaneous Input Signals And Voltage Reference; Pm_Sus_Clk/Agp_Pipe# Design Consideration - Intel 855GM Design Manual

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LCLKCTRLA/LCLKCTRLB GMBUS pair. LCLKCTRLA/LCLKCTRLB are used as bootup straps.
Please refer to the Intel 855GM/GME (Montara-GM/GM+) Chipset GMCH External Design
Specification for details on strapping option. This will prevent the GMCH from confusing noise on
these lines for false cycles.
8.5.1.

Leaving the GMCH DVOB or DVOC Port Unconnected

If the motherboard does not implement any of the possible video devices with the DVO port, DVO Data
output signals may be left unconnected. However pull-up or pull-down resistors are required for the
following:
Pull-down resistors are required:
• DVOBFLDSTL
• DVOCFLDSTL
• DVOBCCLKINT
Pull-up resistors are required:
• DVOBCINTR#
8.5.2.

Miscellaneous Input Signals and Voltage Reference

• ADDID[7]: Pulldown to ground with a 1-kΩ resistor when using the DVOB or DVOC port. This
is a strapping option for video BIOS to load the TPV AIM module for DVOB and DVOC port.
Pulldown not required if DVOB or DVOC is not enabled.
• ADDID[6:0]: Leave unconnected (NC).
• DVODETECT: Leave unconnected (NC) when using the DVOB or DOVC port.
• AGPBUSY#: Connects directly to ICH4-M. A 10-k pullup resistor is required. If using 855GME
platform with external AGP graphics this signal may be left no connect.
• DVORCOMP is used to calibrate the DVOB and DVOC buffers. It should be connected to ground
via a 40.2 Ω 1% resistor using a routing guideline of 10mil trace and 20mil spacing.
• DPMS: connects to 1.5V version of the ICH4-M's SUSCLK or a clock that runs during S1.
• GVREF: Reference voltage for the DVOB and DVOC input buffers. Refer to the figure below for
proper signal conditioning.
8.5.3.

PM_SUS_CLK/AGP_PIPE# Design Consideration

The following design consideration provides the option to support both AGP and DVO devices with one
AGP/ADD Connector. Refer to Figure 86 for more detail.
The GMCH expects PM_SUS_CLK when there is no AGP device. However, when there is an AGP
device this pin functions as AGP_PIPE#. The AGP_TYPEDET# signal is driven high when no AGP
card is detected, allowing DPMS_CLK to be driven by PM_SUS_CLK. In the case where an AGP card
is detected, AGP_TYPE# signal goes high which disconnects PM_SUS_CLK and allows direct connect
of AGP_PIPE# between GMCH and AGP connector.
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Intel 855GM/855GME Chipset Platform Design Guide
Integrated Graphics Display Port
175