Intel EP80579 Manual page 289

Integrated processor product line
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Table 100.
Schematic Checklist (Sheet 6 of 26)
Checklist Items
GPIO[10:8]
GP11_SMBALERT#
GPIO[13:12]
GPIO[15:14]
GP16_IRQ24
GP17_IRQ25
®
Intel
EP80579 Integrated Processor Product Line
Platform Design Guide
289
®
Intel
EP80579 Integrated Processor Product Line—Schematics Checklist
I/O Type
Recommendations
(Default)
I
• Input Only (GPI).
• Input Only if used as GPI.
I
• Can be used as SMBus Alert:
Wake System or generate SMI#
I
• Input Only GPI.
I
• Input Only (GPI).
• Input/Output configurable if
used as GPIO[16].
Strapping Options:
A16 Overide Strap
• This strap selects the treatment
of A16 for cycles going to BIOS
space (but not feature space) in
the FWH.
EP80579 interprets this strap as
follows:
• 0 = EP80579 does not invert
I/O
A16
• 1 = EP80579 inverts A16 on
some BIOS cycles (default =
1)
Note:
• Since there is an internal pull-
up, there is no need for an
external pull-up for the system
to operate in the default state.
• Pull to GND with 1KΩ ± 5%
resistor to overide the
inversion.
• Input/Output configurable if
used as GPIO[17].
• Can be strapped for SPI Boot-
up
• Can be used as IRQ[25]
• This pin, in conjuction with
GP33_IRQ33, can be strapped
to select the source of BIOS
I/O
during boot-up.
• Since GP17 and GP33 have
internal pull-ups, the default
boot up is set to FWH. GP17
and GP33 should be strapped to
ground through 1KΩ pull-down
resistors to configure the boot
source to the SPI Flash
Comments
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Suspend Power Well
• Must be pulled high through a 10
KΩ resistor if used for SMBALERT#
or if not used
• Resides in Suspend Power Well
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Core Power Well
• Must be pulled high through a 10
KΩ resistor if not used.
• Resides in Suspend Power Well
• This signal can function as either
GPIO[16] or IRQ[24].
• Resides in Core Power Well
• 50KΩ internal pull-up.
• This signal can function as either
GPIO[17] or IRQ[25].
• 50KΩ internal pull-up
Boot BIOS Selection Strap: This strap
selects the source of the BIOS during
boot.
EP80579 interprets GP17 & GP33
strappings as follows:
GP17 GP33 (Boot Options)
0 0 Boot BIOS from SPI
0 1 Reserved
1 0 Reserved
1 1 (Default) Boot BIOS from LPC
• See
Table 74
for more details
Order Number: 320068-005US
May 2010

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