®
Contents-Intel
EP80579 Integrated Processor Product Line
Contents
1.0
Introduction....................................................................................................................................20
1.1
Reference Documentation ..................................................................................................20
1.2
Acronyms and Terminology ................................................................................................21
2.0
System Overview...........................................................................................................................24
2.1
2.1.1
EP80579 Features .................................................................................................24
2.2
Development Board ............................................................................................................26
2.2.1
2.3
3.0
Baseboard Requirements ..............................................................................................................32
3.1
3.2
Platform Stack-Up...............................................................................................................35
3.3
Mounting .............................................................................................................................36
4.0
Component Quadrant Layout ........................................................................................................37
4.1
Quadrant Layout .................................................................................................................38
5.0
High-Speed Design Concerns .......................................................................................................40
5.1
Return Path.........................................................................................................................40
5.2
Decoupling Theory..............................................................................................................40
5.2.1
Bulk Decoupling .....................................................................................................41
5.2.2
5.3
Serpentine Routing .............................................................................................................41
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
DC Blocking Capacitor...........................................................................................48
5.5
EMI Design Consideration ..................................................................................................48
5.5.1
Brief EMI Theory ....................................................................................................49
5.5.2
5.5.3
EMI Test Capabilities ............................................................................................49
5.5.4
5.5.5
Differential Clocking ..............................................................................................51
5.6
Length Tuning ....................................................................................................................52
5.6.1
5.6.2
5.6.3
5.7
System Bus Tuning.............................................................................................................56
5.7.1
5.8
Common Layout Pit-Falls ..................................................................................................57
5.8.1
Signal Parallelism .................................................................................................57
5.8.2
Via Sharing ...........................................................................................................59
5.8.3
Necking Down........................................................................................................60
May 2010
Order Number: 320068-005US
®
Intel
EP80579 Integrated Processor Product Line
3