Differential Clocking; Length Tuning Parameters - Intel EP80579 Manual

High-Speed Design Concerns—Intel
Figure 23. Impact of Spread Spectrum Clocking on Radiated Emissions
SCC
5.5.5

Differential Clocking

Differential clocking requires the clock generator supply both clock and clock-bar
traces. Clock-bar has equal and opposite current as the primary clock and is also 180°
out of phase. To maximize the benefit of differential clocking, both clock lines must be
routed parallel to each other for their entire length. Devices connected to the clock
must also be designed to accept both the clock and clock-bar signals.
EMI reduction due to differential clocking is caused by H-field cancellation. Since H-field
orientation is generated by and is dependent upon current flow, two equal currents
flowing in opposite directions and 180° out of phase may have their H-fields cancelled
(see Figure
Figure 24. Cancellation of H-fields Through Inverse Currents
H-field
caused by
Iclk
®
Intel EP80579 Integrated Processor Product Line
Order Number: 320068-005US
®
EP80579 Integrated Processor Product Line
(1-δ)f
nom
24). Lower H-fields may result in reduced EMI radiation.
CLK - clock trace
Iclk
Δ
non-SSC
f
nom
CLK' - clock bar
trace
Iclk'
H-field
caused by
Iclk'
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