Intel EP80579 Manual page 14

Integrated processor product line
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23
CLK14 Group Routing Guidelines ........................................................................................ 102
24
CLK48 Routing Guidelines ................................................................................................... 103
25
Clock Grouping for Decoupling / Filtering............................................................................. 105
26
DDR Terminology................................................................................................................. 111
27
Supported DDR2 Device Densities and Widths ................................................................... 111
28
Supported DRAM Capacity for 64-bit Mode ......................................................................... 112
29
Supported DRAM Capacity for 32-bit Mode ......................................................................... 112
30
Supported DDR2 Data Speeds ............................................................................................ 113
31
Supported DIMM Populations .............................................................................................. 113
32
33
256Mb Addressing ............................................................................................................... 114
34
512Mb Addressing ............................................................................................................... 114
35
1Gb Addressing.................................................................................................................... 115
36
2Gb Addressing.................................................................................................................... 115
37
DDR2 Signal Groups............................................................................................................ 118
38
Length Matching Formulas between EP80579 and DDR2 DIMM ........................................ 119
39
Data and Strobe Signal Group Routing Guidelines.............................................................. 121
40
Differential Clock Signal Mapping ........................................................................................ 123
41
Clock Signal Group Routing Guidelines ............................................................................... 125
42
DDR2 Control Signal Group Routing Guidelines.................................................................. 127
43
Write Operation ODT Table.................................................................................................. 128
44
Read Operation ODT Table ................................................................................................. 129
45
Address and Command Signals........................................................................................... 129
46
DDR2 Address/Command Signal Group Routing Guidelines .............................................. 130
47
DDR V
Generation Requirements .................................................................................. 133
REF
48
49
PCI Express Connector Routing (EP80579 Transmit) ......................................................... 141
50
PCI Express Connector Routing (EP80579 Receive) .......................................................... 142
51
52
53
PCI Express Down Device Routing (EP80579 Transmit)..................................................... 146
54
PCI Express Down Device Routing (EP80579 Receive)...................................................... 147
55
56
57
No Connect Signals for Unused PCI Express Ports............................................................. 151
58
Transmit and Receive Routing Guidelines ........................................................................... 154
59
SATA_RBIAS/SATA_RBIAS# Routing Summary ................................................................ 159
60
Case 1, USB Routing Guidelines - EP80579 to Connector................................................. 165
61
Case 2, USB Routing Guidelines - EP80579 Front Panel Option ....................................... 166
62
Case 3, USB Routing Guidelines - Optional Front Panel Solution ...................................... 167
63
USB 2.0 Trace Length Guidelines........................................................................................ 169
64
USB_RBIASp/USB_RBIASn Routing Summary .................................................................. 170
65
Conductor Resistance (Table 6-6 from USB 2.0 Specification) ........................................... 174
66
Front Panel Header Pin-Out................................................................................................. 175
67
Bus Capacitance Reference Chart....................................................................................... 180
68
Bus Capacitance/Pull-Up Resistor Relationship .................................................................. 180
69
Enabled System Management Vendors............................................................................... 182
70
Routing Recommendations .................................................................................................. 189
71
RTC Routing Summary ........................................................................................................ 194
72
Serial Peripheral Interface Signal Description...................................................................... 199
®
Intel
EP80579 Integrated Processor Product Line
14
®
Intel
EP80579 Integrated Processor Product Line-Contents
May 2010
Order Number: 320068-005US

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