Figure 14.4 Clock Output Control Register (Clke); Clock Output Control Register (Clke) - Fujitsu F2MC-8L MB89620 Series Hardware Manual

4
14.

Clock Output Control Register (CLKE)

The clock output control register is used to enable or disable clock output.
n Clock Output Control Register (CLKE)
Address
0026
R/W : Readable and writable
—
X
Table 14.4 Clock Output Control Register (CLKE) Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Check: The clock output control register is an vacant register on products that do not support the monitor
clock output function. Do not use the register on these products.
MB89620 series
Bit 7 Bit 6 Bit 5
— — —
H
: Unused
: Indeterminate
: Initial value

Figure 14.4 Clock Output Control Register (CLKE)

Bit
• The read value is indeterminate.
Unused bits
• Writing to these bits has no effect on the operation.
• This bit enables or disables clock output.
Clock output is disabled when this bit is "0" and the pin function as a general-
CLKEN:
purpose port (P30) or the external clock input pin for activating A/D conversion
Clock output control
(ADST).
bit
Clock output is enabled when this bit is "1" and the pin functions as the clock
output pin (CLKO).
Bit 4 Bit 3 Bit 2
— — —
Clock output control bit
CLKEN
Functions as a general-purpose port (P30) or the external
0
clock input pin for activating A/D conversion (ADST).
Outputs a clock signal consisting of the divide-by-two source
1
oscillation (5 MHz for a 10 MHz source oscillation).
Function
CHAPTER 14 CLOCK MONITOR FUNCTION
Bit 1 Bit 0 Initial value
— CLKEN XXXXXXX0
B
R/W
14
267