Figure 3.8.4B Example Of Connecting External Memory And Peripheral Function - Fujitsu F2MC-8L MB89620 Series Hardware Manual

n External Bus Connection Example
This section gives an example of connecting external memory and a peripheral function in
external bus operation. The connection example shows the external bus is used after hold
operation of the external bus pin control register (BCTR: HLD="1") is enabled in internal ROM/
external bus mode. An external pull-up resistor must be connected to the BUFC pin when using
the hold function. Also, the AD0 to AD7, A08 to A15, and ALE signals are output during internal
access but the RD, WR, and BUFC pins output an "H" level.
Figure 3.8.4b shows the example of connecting external memory and a peripheral function.
MB89620 series
AD0 to AD7
A08 to A15

Figure 3.8.4b Example of Connecting External Memory and Peripheral Function

MB89620 series
8
D
Address
latch
ALE
G
8
A
Data bus
RDY
buffer
BUFC
DIR
HAK
RD
WR
16
A0 to A15
Q
Address
decoder
OC
8
B
D CS
ROM
G
RD
Address Address
decoder decoder
D0 to D7
D CS D
RAM
Peripheral function
RD WR RD
CHAPTER 3 CPU
CS
WR
83